VIVADO报错记录

报错1：[DRC PDRC-43] PLL_adv_ClkFrequency_div_no_dclk: The computed value 200.000 MHz (CLKIN1_PERIOD, net clk_out1) for the VCO operating frequency of the PLLE2_ADV site PLLE2_ADV_X1Y1 (cell top_dual_ov5640_hdmi10/u_ddr3_top/u_mig_7series_0/u_mig_7series_0_mig/u_ddr3_infrastructure/plle2_i) falls outside the operating range of the PLL VCO frequency for this device (800.000 - 1866.000 MHz). The computed value is (CLKFBOUT_MULT_F * 1000 / (CLKINx_PERIOD * DIVCLK_DIVIDE)). Please adjust either the input period CLKINx_PERIOD (20.000000), multiplication factor CLKFBOUT_MULT_F (4) or the division factor DIVCLK_DIVIDE (1), in order to achieve a VCO frequency within the rated operating range for this device.

        报错原因：设置的时钟频率超出例化器件的工作频率范围

        解决方案：检查时钟ip所分配的时钟的时钟是否正确。

报错2[Synth 8-3438] module 'key_debounce' declared at 'E:/Vinci_test/verilog/key_debounce.v:1' does not have any parameter 'CNT_MAX1' used as named parameter override ["E:/Vinci_test/verilog/lcd_rgb_char.v":368]

        报错原因：常量如果在顶层模块和其他模块的值不一样，会使用顶层模块里面的值。或常量名不一致所导致的

        解决方案：检查常量名是否一致，localparameter更改为parameter

报错3：

        报错情况：

                3.1：ERROR: [Common 17-217] Failed to load feature ‘core‘.:

                3.2：Error when launching 'D:\xilinx\Vivado\2019.2\bin\vivado.bat': Launcher time

        解决方法：

               参考： 2019.2vivado无法打开

               一开始我根据参考最后一个方法进行尝试解决（如下图），但没有成功解决，于是我想着参考中是修复，那我试着卸载重新安装，重启电脑，没有成功，后面将插在电脑的u盘拔下来之后，软件就可以正常使用了。

报错4：[DRC UCIO-1] Unconstrained Logical Port: 3 out of 38 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined.  To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1].  NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run.  Problem ports: IN[2], arm_pwm[0], and ENB.

报错原因：引脚分配起冲突了

解决方法：重新分配引脚