Mbist

Architecture

DONE	GO	RESULT
1	1	The Mbist test ran to completion and passed
0	1	The Mbist controller did not complete the test but no errors were found so far
1	0	The Mbist controller completed the test, but one of the memories being tested failed
0	0	The Mbist controller did not completed the test and a memory being tested failed

Key Features

1. Unlimited number of memories, ports, and configurations per Memory Bist controller
2. Memory BIst controller can test multiple memories in parallel
3. Patented shadow read capability supports testing for inter-port faults
4. Comprehensive set of field-proven memory test algorithems
5. Diagnosis capabilities for full failure bit map
6. Support for memories with built-in test interface
7. Hierarchical access supports incremental verification and core reuse.