Embeded IP Licensing

Embedded Programmable-IPs provide high-performance, low-cost, and high utilization (99%+) , proven by existing leading customers and abundant full-mask tapeouts verified.
Process layouts are ready in 0.18um, 0.13um, 0.11um, 65nm, 55nm, 40nm nodes at the leading foundries, and any cutting-edge cmos technologies. Manufacturing cost is less than 1 to 2 cents per k-LUT, in any geometry (row by column tile) layout configuration. Silicon size is as small as 0.8mm^2 for 1280 LUT for commonly available technology nodes in all foundries.
Utilization (LUT) for actual designs are commonly up to 99%+. That makes it possible for building multi-million gates while high performance device for communication markets. This key differentiating technologies are licensable to IC companies or FPGA IC companies targetting communiction markets.
Contact us for more technical and business information:
kh_hsiah@126.com

提供高利用率(99%以上)、低成本的嵌入式可编程IP,已在领先客户和丰富的全掩膜流片中验证。适用于0.18um至40nm等节点工艺,制造成本低至每千LUT 1至2美分。实测设计利用率达到99%以上,适合通信市场多百万门规模高性能设备。
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