How do I make VCS ignore timing between synchronizer flops?

Question:

How do I make VCS ignore SDF timing between synchronizer flip flops in my 
full timing gate simulation?

Answer:

VCS accepts  configuration file that can enable/disable certain features and 
options.One of these features is the ability to specify a list of modules or
instances that can have their timing checks ignored.

Configuration file is a plain text file with a list of instances using
following syntax:

instance [Instance] {noTiming};

For our example, we will save the file as notiming.cfg.

VCS Elaboration command will look like following.

  % vcs +optconfigfile+notiming.cfg [remaining vcs options]

Alternatively, you could also disable timing checks on certain instances using
tcheck command at Runtime on UCLI prompt. 

Syntax: 
 tcheck instance|port tcheck_type -msg|-xgen  -disable|-enable -r
    [instance|port] is a hierarchical full path name of an instance or port
    [tcheck_type] is one of [all|HOLD|SETUP|SETUPHOLD|WIDTH|RECOVERY|REMOVAL|
                  RECREM|PERIOD|NOCHANGE|SKEW],which is used to indicate which
                  type of timing check we want to change
    [-msg|-xgen]  controls simulation behavior when a timing check violation is 
                  detected.
       [-msg] disable/enable timing violation warning on the specified instance
          or port
       [-xgen] disable/enable notifier toggling on the specified instance or port
     [-disable|-enable] turn off/on timing check according to the above 
                        constraints(by default, all timing checks are enabled)
     [-r] change all timing checks for specified instance and all sub-instance recursively
     [-query] get the timing check control status

Please refer to following solvnet article on tcheck command or VCS userguide
for details.
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