根据官方描述, Advisory 1.2.1 The Buffer Logic of VPSS is Not Reset by System Reset Pin
需要对UBL做下面的更新:
更新部分如下:
从device.c(dm36x\common\src) line 174开始:
//add by mike
#define SYSTEM_RESET_EN *((volatile unsigned int *)0x01C21C08)
#define SYSTEM_RESET_TRIGGER *((volatile unsigned int *)0x01C21C0C)
#define MDSTAT_VPSS *((volatile unsigned int *)0x01C418BC)
#define MDCTL_VPSS *((volatile unsigned int *)0x01C41ABC)
#define TMPBUF *(unsigned int *)(0x17ff8)
#define TMPSTATUS *(unsigned int *)(0x17ff0)
#define FLAG_PORRST 0x00000001
#define FLAG_WDTRST 0x00000002
#define FLAG_FLGON 0x00000004
#define FLAG_FLGOFF 0x00000010
void WDT_FLAG_ON()
{
SYSTEM->VPSS_CLKCTL &= 0xffffff7f; // VPSS_CLKMD 1:2
TMPBUF = 0x591b3ed7;
TMPSTATUS |= FLAG_FLGON;
}
//add end
void POR_RESET()
{
//add by mike
unsigned int s;
//add end
if ((PLL1->RSTYPE)&3) {
VPSS_SYNC_RESET(); // VPSS sync reset
//add by mike
TMPBUF = 0;
TMPSTATUS |= FLAG_PORRST;
//add end
*GPINT_GPEN = 0x00020000;
*GPTDAT_GPDIR = 0x00020002;
while(1);
}
//add by mike
if((TMPBUF == 0x591b3ed7))
{
// Execute on Watchdog Reset situation
TMPBUF = 0;
TMPSTATUS |= FLAG_PORRST;
TMPSTATUS |= FLAG_FLGOFF;
for (s=0;s<0x100;s++)
{ }
VPSS_SYNC_RESET(); // VPSS sync reset
SYSTEM_RESET_EN = 0x00020000; // Watchdog timer enable for system reset
SYSTEM_RESET_TRIGGER = 0x00020002; // Watchdog timer trigger for system reset
while(1);
}
WDT_FLAG_ON();
//add end
}