脚本1:
/*
* dts file for Hisilicon tiangong0 Development Board
*
* Copyright (C) 2022-09-07, Hisilicon Ltd.
*
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "hsan,tiangong0";
board_id = <0>;
vendor_id = "hsan";
fragment@0 {
target-path = "/";
__overlay__ {
board_id = <0>;
vendor_id = "hsan";
};
};
fragment@1 {
target = <&pmupwm>;
__overlay__ {
pinctrl-0 = <&pmupwm_sig1_state>;
};
};
fragment@2 {
target = <&peri_gpio0>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&gpio7_default_state>, <&gpio12_default_state>, <&gpio13_default_state>,
<&gpio27_default_state>, <&gpio28_default_state>;
};
};
fragment@3 {
target = <&gemac3>;
__overlay__ {
phy-mode = "gmii";
sgmii;
phy-handle = <&gephy3>;
};
};
fragment@4 {
target = <&gemac4>;
__overlay__ {
status = "disabled";
};
};
fragment@5 {
target = <&gephy4>;
__overlay__ {
status = "disabled";
};
};
fragment@8 {
target = <&usb3_xhci>;
__overlay__ {
status = "disabled";
};
};
fragment@9 {
target = <&serdes0>;
__overlay__ {
status = "disabled";
};
};
fragment@10 {
target = <&serdes1>;
__overlay__ {
status = "disabled";
};
};
fragment@11 {
target = <&gephy3_2p5>;
__overlay__ {
status = "disabled";
};
};
fragment@12 {
target = <&gephy3>;
__overlay__ {
status = "okay";
};
};
fragment@13 {
target = <&i2c1>;
__overlay__ {
status = "disabled";
};
};
fragment@14 {
target = <&spi0>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&gpio34_default_state>;
slicdev {
compatible = "hsan,slic-spidev";
reg = <0>;
spi-max-frequency = <4096000>;
zsi;
rst-gpios = <&portb 2 GPIO_ACTIVE_HIGH>; /* gpio34 */
gpio-delay = <50>;
spi-cpha;
spi-cpol;
spi-cs-high;
};
};
};
fragment@15 {
target = <&hwdio>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&hw0_default_state>;
interface-mode = <1>; /* 0:hw; 1:zsi; 2:isi */
clk-sel = <0>; /* 0:osc; 1:serdes0; 2:serdes1; 3:serdes2 */
clk-mode = <1>; /* 0:input clk; 1:output clk */
clk-rate = <0>; /* 0:8MHz; 1:4MHz; 2:1MHz; 4:512KHz */
rx-edge = <1>; /* 0:up edge; 1:down edge */
tx-edge = <0>; /* 0:up edge; 1:down edge */
rx-align = <0>; /* value[0,1023] */
tx-align = <0>; /* value[0,1023] */
fs-edge = <0>; /* 0:up edge; 1:down edge */
fs-level = <1>; /* 0:low level; 1:hight level */
fs-rate = <1>; /* sample rate 0:8KHz; 1:16KHz */
fs-mode = <1>; /* 0:normal mode; 1:8KHz mode */
pcm-wide = <1>; /* 0:8bit; 1:16bit */
};
};
fragment@16 {
target = <&mii_misc_ge3_2p5>;
__overlay__ {
status = "disabled";
};
};
fragment@17 {
target = <&pinctrl_peri>;
__overlay__ {
pinctrl-0 = <&peri_power_source0_3v3_state>,
<&peri_power_source1_3v3_state>,
<&peri_power_source2_3v3_state>;
pinctrl-names = "default";
};
};
fragment@18 {
target = <&gephy0>;
__overlay__ {
/* led-polar
* 00:on-drive LED low, off-drive LED high
* 01:on-drive LED high, off-drive LED low
* 10:on-drive LED low, off-tristate LED high
* 11:on-drive LED high, off-tristate LED high */
/* led-freq
* eg:led-freq = <200>;Blink period is 200ms */
led-polar = <0x0>;
led-mode = <0x1>; /* single_led 1, double_led 2 */
pinctrl-names = "default";
pinctrl-0 = <&gephy_led0_default_state>;
};
};
fragment@19 {
target = <&gephy1>;
__overlay__ {
led-mode = <1>;
led-polar = <0>;
pinctrl-names = "default";
pinctrl-0 = <&gephy_led1_default_state>;
};
};
fragment@20 {
target = <&gephy2>;
__overlay__ {
led-mode = <1>;
led-polar = <0>;
pinctrl-names = "default";
pinctrl-0 = <&gephy_led2_default_state>;
};
};
fragment@21 {
target = <&gephy3>;
__overlay__ {
led-mode = <1>;
led-polar = <0>;
pinctrl-names = "default";
pinctrl-0 = <&gephy_led3_default_state>;
};
};
};
脚本2:
/*
* dts file for Hisilicon tiangong0 Development Board
*
* Copyright (C) 2022-09-07, Hisilicon Ltd.
*
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "hsan,tiangong0";
board_id = <0>;
vendor_id = "vendor3";
fragment@0 {
target-path = "/";
__overlay__ {
board_id = <0>;
vendor_id = "vendor3";
};
};
fragment@1 {
target = <&upsphy0>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&usb3ctrl>;
__overlay__ {
phys = <&usb2phy0>, <&upsphy0>;
phy-names = "usb2phy", "upsphy";
};
};
fragment@3 {
target = <&usb3_xhci>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&peri_gpio0>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&gpio1_default_state>, <&gpio27_default_state>, <&gpio28_default_state>,
<&gpio29_default_state>, <&gpio38_default_state>, <&gpio39_default_state>,
<&gpio40_default_state>, <&gpio41_default_state>;
};
};
fragment@5 {
target = <&i2c1>;
__overlay__ {
status = "disabled";
};
};
fragment@6 {
target = <&pinctrl_peri>;
__overlay__ {
pinctrl-0 = <&peri_power_source0_3v3_state>,
<&peri_power_source1_3v3_state>,
<&peri_power_source2_3v3_state>;
pinctrl-names = "default";
};
};
fragment@7 {
target = <&pmupwm>;
__overlay__ {
pinctrl-0 = <&pmupwm_sig1_state>;
};
};
fragment@8 {
target = <&spi0>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&gpio34_default_state>;
slicdev {
compatible = "hsan,slic-spidev";
reg = <0>;
spi-max-frequency = <4096000>;
zsi;
rst-gpios = <&portb 2 GPIO_ACTIVE_HIGH>; /* gpio34 */
gpio-delay = <50>;
spi-cpha;
spi-cpol;
spi-cs-high;
};
};
};
fragment@9 {
target = <&hwdio>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&hw0_default_state>;
interface-mode = <1>; /* 0:hw; 1:zsi; 2:isi */
clk-sel = <0>; /* 0:osc; 1:serdes0; 2:serdes1; 3:serdes2 */
clk-mode = <1>; /* 0:input clk; 1:output clk */
clk-rate = <0>; /* 0:8MHz; 1:4MHz; 2:1MHz; 4:512KHz */
rx-edge = <1>; /* 0:up edge; 1:down edge */
tx-edge = <0>; /* 0:up edge; 1:down edge */
rx-align = <0>; /* value[0,1023] */
tx-align = <0>; /* value[0,1023] */
fs-edge = <0>; /* 0:up edge; 1:down edge */
fs-level = <1>; /* 0:low level; 1:hight level */
fs-rate = <1>; /* sample rate 0:8KHz; 1:16KHz */
fs-mode = <1>; /* 0:normal mode; 1:8KHz mode */
pcm-wide = <1>; /* 0:8bit; 1:16bit */
};
};
fragment@10 {
target = <&gemac4>;
__overlay__ {
status = "disabled";
};
};
fragment@11 {
target = <&gephy4>;
__overlay__ {
status = "disabled";
};
};
fragment@12 {
target = <&gemac8>;
__overlay__ {
status = "disabled";
};
};
fragment@13 {
target = <&gephy5>;
__overlay__ {
status = "disabled";
};
};
fragment@14 {
target = <&gemac3>;
__overlay__ {
phy-mode = "gmii";
phy-handle = <&gephy3>;
};
};
fragment@15 {
target = <&gephy3_2p5>;
__overlay__ {
reg = <0x1>;
status = "disabled";
reset-gpios = <&porta 29 1>;
};
};
fragment@16 {
target = <&mdio1>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&extphy1_default_state>;
};
};
fragment@17 {
target = <&gephy0>;
__overlay__ {
/* led-polar
* 00:on-drive LED low, off-drive LED high
* 01:on-drive LED high, off-drive LED low
* 10:on-drive LED low, off-tristate LED high
* 11:on-drive LED high, off-tristate LED high */
/* led-freq
* eg:led-freq = <200>;Blink period is 200ms */
led-polar = <0x0>;
led-mode = <0x1>; /* single_led 1, double_led 2 */
pinctrl-names = "default";
pinctrl-0 = <&gephy_led0_default_state>;
};
};
fragment@18 {
target = <&gephy1>;
__overlay__ {
led-mode = <1>;
led-polar = <0>;
pinctrl-names = "default";
pinctrl-0 = <&gephy_led1_default_state>;
};
};
fragment@19 {
target = <&gephy2>;
__overlay__ {
led-mode = <1>;
led-polar = <0>;
pinctrl-names = "default";
pinctrl-0 = <&gephy_led2_default_state>;
};
};
fragment@20 {
target = <&gephy3>;
__overlay__ {
led-mode = <1>;
led-polar = <0>;
pinctrl-names = "default";
pinctrl-0 = <&gephy_led3_default_state>;
status = "okay";
};
};
fragment@21 {
target = <&mii_misc_ge3_2p5>;
__overlay__ {
status = "disabled";
};
};
};
这来脚本你的异同