以下代码实现的功能，代码中关键信号的解析，代码中不同的端口使能信号的变化在代码中会有哪些变化请详细说明，代码中每个always和assign作用，代码是否具有普适性：
//Copyright 1986-2014 Xilinx, Inc. All Rights Reserved.
//--------------------------------------------------------------------------------
//Tool Version: Vivado v.2014.4 (win64) Build 1071353 Tue Nov 18 18:24:04 MST 2014
//Date : Mon Mar 07 16:31:19 2016
//Host : ALLEN-PC running 64-bit Service Pack 1 (build 7601)
//Design : link_data_remapping
//--------------------------------------------------------------------------------
`timescale 1ns/1ps
`define eightlane
module link_data_division (
/////////SYSTEM ///////////////////////////////////////
input lvds_sysClk ,
(* MARK_DEBUG="true" *)input [3 :0] pic_h_div_mode , //0：正常模式 1：垂直均分为2块 2：垂直均分为4块
(* MARK_DEBUG="true" *)input [1 :0] pid_rx_link_num , //0：1link 1：2link 2：4link 3：8link
input [12:0] pid_hsd_de_num ,
input [12:0] pid_vsd_de_num ,
////////INPUT LINK DATA ///////////////////////////////////////
(* MARK_DEBUG="true" *)input [29:0] pid_bmp_data0 ,
(* MARK_DEBUG="true" *)input [29:0] pid_bmp_data1 ,
(* MARK_DEBUG="true" *)input [29:0] pid_bmp_data2 ,
(* MARK_DEBUG="true" *)input [29:0] pid_bmp_data3 ,
(* MARK_DEBUG="true" *)input pic_bmp_vsync ,
(* MARK_DEBUG="true" *)input pic_bmp_hsync ,
(* MARK_DEBUG="true" *)input pic_bmp_de ,
////////div_de ///////////////////////////////////
input pic_link_division_pattern_de ,
input pic_link_division_pattern_hsync ,
input pic_link_division_pattern_vsync ,
input [29:0] pid_bmp_data4 ,
input [29:0] pid_bmp_data5 ,
input [29:0] pid_bmp_data6 ,
input [29:0] pid_bmp_data7 ,
output reg[29:0] pod_bmp_data_link4 = 30'b0 ,
output reg[29:0] pod_bmp_data_link5 = 30'b0 ,
output reg[29:0] pod_bmp_data_link6 = 30'b0 ,
output reg[29:0] pod_bmp_data_link7 = 30'b0 ,
////////OUTPUT LINK DATA REMAPPING ///////////////////////////
(* MARK_DEBUG="true" *)output reg[29:0] pod_bmp_data_link0 = 30'b0 ,
(* MARK_DEBUG="true" *)output reg[29:0] pod_bmp_data_link1 = 30'b0 ,
(* MARK_DEBUG="true" *)output reg[29:0] pod_bmp_data_link2 = 30'b0 ,
(* MARK_DEBUG="true" *)output reg[29:0] pod_bmp_data_link3 = 30'b0 ,
(* MARK_DEBUG="true" *)output reg poc_bmp_link_de = 1'b0 ,
(* MARK_DEBUG="true" *)output reg poc_bmp_link_hsync = 1'b1 ,
(* MARK_DEBUG="true" *)output reg poc_bmp_link_vsync = 1'b1 ,
input special_mode
);
reg [1:0] fifo_out_cnt = 2'b0 ;
reg [1:0] fifo_outto_cnt = 2'b0 ;
reg [1:0] fifo_out_cnt_dly = 2'b0 ;
reg [12:0] r_4TCOM_hsd_de_num = 13'b0 ;
reg [12:0] r_2TCOM_hsd_de_num = 13'b0 ;
reg [12:0] r_TCOM_hsd_de_num = 13'b0 ;
reg [12:0] r_hsd_pix_cnt = 13'b0 ;
reg [1:0] r_wr_pingpong_flag_cnt = 2'b0 ;
reg [1:0] r_wr_pingpong_flag_cnt_reg = 2'b0 ;
reg [1:0] r_wr_pingpong_flag_cnt_reg1 = 2'b0 ;
reg [1:0] r_wr_pingpong_flag_cnt_reg2 = 2'b0 ;
reg [1:0] r_wr_pingpong_flag_cnt_reg3 = 2'b0 ;
reg r_bmp_de = 1'b0 ;
reg r_bmp_vsync = 1'b0 ;
reg r_bmp_hsync = 1'b0 ;
reg [29:0] r_bmp_data0 = 30'b0 ;
reg [29:0] r_bmp_data1 = 30'b0 ;
reg [29:0] r_bmp_data2 = 30'b0 ;
reg [29:0] r_bmp_data3 = 30'b0 ;
reg [29:0] r_bmp_data4 = 30'b0 ;
reg [29:0] r_bmp_data5 = 30'b0 ;
reg [29:0] r_bmp_data6 = 30'b0 ;
reg [29:0] r_bmp_data7 = 30'b0 ;
reg[2:0] fifo_in_cnt =3'b0;
reg r_wr_bmp_en = 1'b0 ;
reg r_bmp_de_dly1 = 1'b0 ;
reg r_bmp_de_dly2 = 1'b0 ;
reg r_bmp_de_dly3 = 1'b0 ;
reg r_bmp_de_dly4 = 1'b0 ;
reg r_bmp_de_dly5 = 1'b0 ;
reg r_bmp_de_dly6 = 1'b0 ;
reg r_bmp_de_dly7 = 1'b0 ;
reg r_bmp_de_dly8 = 1'b0 ;
reg r_bmp_de_dly9 = 1'b0 ;
reg r_bmp_de_dly10 = 1'b0 ;
reg r_wr_rd_bmp_flag = 1'b0 ;
reg r_wr_buffer_link0_en = 1'b0 ;
reg r_wr_buffer_link1_en = 1'b0 ;
reg r_wr_buffer_link2_en = 1'b0 ;
reg r_wr_buffer_link3_en = 1'b0 ;
reg [119:0] r_wr_buffer_link_dat = 120'b0 ;
reg [119:0] r_wr_buffer_link_dat_1 = 120'b0 ;
reg [119:0] r_wr_buffer_link_dat_1_temp = 120'b0 ;
reg [119:0] r_wr_buffer_link_dat_temp = 120'b0 ; //8link
reg r_wr_buffer_rst = 1'b0 ;
reg r_rd_buffer_link0_en = 1'b0 ;
reg r_rd_buffer_link1_en = 1'b0 ;
reg r_rd_buffer_link2_en = 1'b0 ;
reg r_rd_buffer_link3_en = 1'b0 ;
reg r_bmp_link_de = 1'b0 ;
reg r_bmp_link_hsync = 1'b0 ;
reg r_bmp_link_vsync = 1'b0 ;
reg r_bmp_link_de_dly = 1'b0 ;
reg r_bmp_link_hsync_dly = 1'b0 ;
reg r_bmp_link_vsync_dly = 1'b0 ;
reg [29:0] r_sel_2TCOM_link0_bmp_dat = 30'b0 ;
reg [29:0] r_sel_2TCOM_link1_bmp_dat = 30'b0 ;
reg [29:0] r_sel_4TCOM_link0_bmp_dat = 30'b0 ;
reg [29:0] r_sel_4TCOM_link1_bmp_dat = 30'b0 ;
reg [29:0] r_sel_4TCOM_link2_bmp_dat = 30'b0 ;
reg [29:0] r_sel_4TCOM_link3_bmp_dat = 30'b0 ;
reg [29:0] r_sel_8TCOM_link0_bmp_dat = 30'b0 ;
reg [29:0] r_sel_8TCOM_link1_bmp_dat = 30'b0 ;
reg [29:0] r_sel_8TCOM_link2_bmp_dat = 30'b0 ;
reg [29:0] r_sel_8TCOM_link3_bmp_dat = 30'b0 ;
reg [29:0] r_sel_8TCOM_link4_bmp_dat = 30'b0 ;
reg [29:0] r_sel_8TCOM_link5_bmp_dat = 30'b0 ;
reg [29:0] r_sel_8TCOM_link6_bmp_dat = 30'b0 ;
reg [29:0] r_sel_8TCOM_link7_bmp_dat = 30'b0 ;
reg rd_flag = 1'b0 ;
reg remap_de = 1'b0 ;
reg remap_de1 = 1'b0 ;
reg remap_de2 = 1'b0 ;
reg remap_de3 = 1'b0 ;
reg remap_de4 = 1'b0 ;
reg [12:0] vs_cnt = 13'b0 ;
reg [12:0] hs_cnt = 13'b0 ;
wire[119:0] w_rd_buffer_link0_dat ;
wire[119:0] w_rd_buffer_link1_dat ;
wire[119:0] w_rd_buffer_link2_dat ;
wire[119:0] w_rd_buffer_link3_dat ;
wire[119:0] w_rd_buffer_link4_dat ;
wire[119:0] w_rd_buffer_link5_dat ;
wire[119:0] w_rd_buffer_link6_dat ;
wire[119:0] w_rd_buffer_link7_dat ;
wire w_rd_empty0 ;
wire w_rd_empty1 ;
wire w_rd_empty2 ;
wire w_rd_empty3 ;
wire[12:0] r_hsd_de_num ;
wire[12:0] r_vsd_de_num ;
wire[ 5:0] w_bmp_link_mode ;
wire[ 5:0] r_bmp_link_mode ;
assign w_bmp_link_mode = {pid_rx_link_num, pic_h_div_mode} ;
sync_cell #(.SYNC_STAGE(2), .DW(16))
sync_hsd_true_pixel (.pid_src_data(pid_hsd_de_num), .pic_sync_clk(lvds_sysClk), .pod_sync_data(r_hsd_de_num));
sync_cell #(.SYNC_STAGE(2), .DW(16))
sync_vsd_true_pixel (.pid_src_data(pid_vsd_de_num), .pic_sync_clk(lvds_sysClk), .pod_sync_data(r_vsd_de_num));
sync_cell #(.SYNC_STAGE(2), .DW(6))
sync_bmp_link_mode (.pid_src_data(w_bmp_link_mode), .pic_sync_clk(lvds_sysClk), .pod_sync_data(r_bmp_link_mode));
//------------------------------------------------------特定分辨率----------------------------------------------
reg r_bmp_de_expend;
reg r1_bmp_de_expend ;
always @(posedge lvds_sysClk) begin
r_bmp_de_expend <= r_bmp_de_dly1 || pic_bmp_de;
//r_bmp_de_expend <= pic_bmp_de;
r1_bmp_de_expend <= r_bmp_de_expend;
end
reg special_flag ;
always @(posedge lvds_sysClk) begin
special_flag <= r_hsd_de_num[0] ;
end
reg [12:0] r_hsd_pix_cnt_1 ;
always @(posedge lvds_sysClk) begin
if(r_bmp_de_expend == 1'b0)
r_hsd_pix_cnt_1 <= #1 13'd0;
else
r_hsd_pix_cnt_1 <= #1 r_hsd_pix_cnt_1 + 13'd1;
end
reg [12:0] r_hsd_pix_cnt_2 ;
always @(posedge lvds_sysClk) begin
if(r_bmp_de_expend == 1'b0)
r_hsd_pix_cnt_2 <= #1 13'd0;
else if(r_hsd_pix_cnt_2 == r_TCOM_hsd_de_num+1'b1) //11111111111111111111111111111111
r_hsd_pix_cnt_2 <= #1 13'd0;
else
r_hsd_pix_cnt_2 <= #1 r_hsd_pix_cnt_2 + 13'd1;
end
reg [1:0] r_wr_pingpong_flag_cnt_1;
always @(posedge lvds_sysClk) begin
if(r_bmp_de_expend == 1'b0)
r_wr_pingpong_flag_cnt_1 <= #1 2'd0;
else if(r_hsd_pix_cnt_2 == r_TCOM_hsd_de_num+1'b1)
r_wr_pingpong_flag_cnt_1 <= #1 r_wr_pingpong_flag_cnt_1 + 2'd1;
end
always @(posedge lvds_sysClk) begin
if(r_bmp_link_mode==6'b100001)begin
//if(special_flag)begin
if(r_hsd_pix_cnt_1<r_TCOM_hsd_de_num) begin
r_wr_buffer_link_dat_1 <= {pid_bmp_data0,pid_bmp_data1,pid_bmp_data2,pid_bmp_data3};
end
else
if(r_hsd_pix_cnt_1==r_TCOM_hsd_de_num) begin
r_wr_buffer_link_dat_1 <= {pid_bmp_data0,pid_bmp_data1,60'b0};
end
else
if((r_hsd_pix_cnt_1>r_TCOM_hsd_de_num)&&(r_hsd_pix_cnt_1<r_hsd_de_num))begin
r_wr_buffer_link_dat_1 <= {r_bmp_data2,r_bmp_data3,pid_bmp_data0,pid_bmp_data1};
end
else
if(r_hsd_pix_cnt_1==r_hsd_de_num-1'b1) begin
r_wr_buffer_link_dat_1 <= {r_bmp_data2,r_bmp_data3,60'b0}; //111111111111111111111111111111
end
//end
end else if(r_bmp_link_mode==6'b110001) begin
if(r_hsd_pix_cnt_1<r_TCOM_hsd_de_num) begin
r_wr_buffer_link_dat_1 <= {pid_bmp_data0,pid_bmp_data1,pid_bmp_data2,pid_bmp_data3};
r_wr_buffer_link_dat_1_temp <= {pid_bmp_data4,pid_bmp_data5,pid_bmp_data6,pid_bmp_data7};
end
else
if(r_hsd_pix_cnt_1==r_TCOM_hsd_de_num) begin
r_wr_buffer_link_dat_1 <= {pid_bmp_data0,pid_bmp_data1,pid_bmp_data2,pid_bmp_data3};
r_wr_buffer_link_dat_1_temp <= 0;
end
else
if((r_hsd_pix_cnt_1>r_TCOM_hsd_de_num)&&(r_hsd_pix_cnt_1<r_hsd_de_num))begin
r_wr_buffer_link_dat_1 <= {r_bmp_data4,r_bmp_data5,r_bmp_data6,r_bmp_data7};
r_wr_buffer_link_dat_1_temp <= {pid_bmp_data0,pid_bmp_data1,pid_bmp_data2,pid_bmp_data3};
end
else
if(r_hsd_pix_cnt_1==r_hsd_de_num-1'b1) begin
r_wr_buffer_link_dat_1 <= 0;
r_wr_buffer_link_dat_1_temp <= {r_bmp_data4,r_bmp_data5,r_bmp_data6,r_bmp_data7}; //111111111111111111111111111111
end
end
end
//-----------------------------------------------------end--------------------------------------------------
always @(posedge lvds_sysClk) begin
r_4TCOM_hsd_de_num <= #1 {2'b0,r_hsd_de_num[12:2]} - 1'b1;
r_2TCOM_hsd_de_num <= #1 {1'b0,r_hsd_de_num[12:1]} - 1'b1;
end
always @(posedge lvds_sysClk) begin
case(r_bmp_link_mode[3:0])
4'd2:
r_TCOM_hsd_de_num <= #1 r_4TCOM_hsd_de_num;
4'd1:
r_TCOM_hsd_de_num <= #1 r_2TCOM_hsd_de_num;
//r_TCOM_hsd_de_num <= #1 13'd444;
default :
r_TCOM_hsd_de_num <= #1 r_hsd_de_num;
endcase
end
//输入行像素计数器
always @(posedge lvds_sysClk) begin
if(pic_bmp_de == 1'b0)
r_hsd_pix_cnt <= #1 13'd0;
else if(r_hsd_pix_cnt == r_TCOM_hsd_de_num)
r_hsd_pix_cnt <= #1 13'd0;
else
r_hsd_pix_cnt <= #1 r_hsd_pix_cnt + 13'd1;
end
//乒乓切换计数器
always @(posedge lvds_sysClk) begin
if(pic_bmp_de == 1'b0)
r_wr_pingpong_flag_cnt <= #1 2'd0;
else if(r_hsd_pix_cnt == r_TCOM_hsd_de_num)
r_wr_pingpong_flag_cnt <= #1 r_wr_pingpong_flag_cnt + 2'd1;
r_wr_pingpong_flag_cnt_reg <= r_wr_pingpong_flag_cnt;
r_wr_pingpong_flag_cnt_reg1 <= r_wr_pingpong_flag_cnt_reg;
r_wr_pingpong_flag_cnt_reg2 <= r_wr_pingpong_flag_cnt_reg1;
r_wr_pingpong_flag_cnt_reg3 <= r_wr_pingpong_flag_cnt_reg2;
end
//输入数据延迟一个时钟周期
always @(posedge lvds_sysClk) begin
r_bmp_de <= #1 pic_bmp_de ;
r_bmp_vsync <= #1 pic_bmp_vsync;
r_bmp_hsync <= #1 pic_bmp_hsync;
r_bmp_data0 <= #1 pid_bmp_data0;
r_bmp_data1 <= #1 pid_bmp_data1;
r_bmp_data2 <= #1 pid_bmp_data2;
r_bmp_data3 <= #1 pid_bmp_data3;
r_bmp_data4 <= #1 pid_bmp_data4;
r_bmp_data5 <= #1 pid_bmp_data5;
r_bmp_data6 <= #1 pid_bmp_data6;
r_bmp_data7 <= #1 pid_bmp_data7;
end
always @(posedge lvds_sysClk) begin
if(pic_bmp_de == 1'b1)
r_wr_bmp_en <= #1 ~r_wr_bmp_en;
else
r_wr_bmp_en <= #1 1'b0;
end
always @(posedge lvds_sysClk) begin
r_bmp_de_dly1 <= #1 pic_bmp_de ;
r_bmp_de_dly2 <= #1 r_bmp_de_dly1;
r_bmp_de_dly3 <= #1 r_bmp_de_dly2;
r_bmp_de_dly4 <= #1 r_bmp_de_dly3;
r_bmp_de_dly5 <= #1 r_bmp_de_dly4;
r_bmp_de_dly6 <= #1 r_bmp_de_dly5;
r_bmp_de_dly7 <= #1 r_bmp_de_dly6;
r_bmp_de_dly8 <= #1 r_bmp_de_dly7;
r_bmp_de_dly9 <= #1 r_bmp_de_dly8;
r_bmp_de_dly10 <= #1 r_bmp_de_dly9;
end
always @(posedge lvds_sysClk) begin
if(!pic_bmp_vsync)
r_wr_rd_bmp_flag <= #1 1'b0;
else if(r_bmp_de_dly10 && !r_bmp_de_dly9)
r_wr_rd_bmp_flag <= #1 ~r_wr_rd_bmp_flag;
end
always @(posedge lvds_sysClk) begin
if(!pic_bmp_de)
fifo_in_cnt <= 1'b0;
else if (fifo_in_cnt==2'd3)
fifo_in_cnt <= 1'b0;
else
fifo_in_cnt <= fifo_in_cnt+1'b1;
end
//写缓冲FIFO数据使能
always @(posedge lvds_sysClk) begin
case(r_bmp_link_mode)
6'b10_0010 :begin
r_wr_buffer_link0_en <= #1 r_wr_pingpong_flag_cnt == 2'd0 & pic_bmp_de == 1'b1;
r_wr_buffer_link1_en <= #1 r_wr_pingpong_flag_cnt == 2'd1 & pic_bmp_de == 1'b1;
r_wr_buffer_link2_en <= #1 r_wr_pingpong_flag_cnt == 2'd2 & pic_bmp_de == 1'b1;
r_wr_buffer_link3_en <= #1 r_wr_pingpong_flag_cnt == 2'd3 & pic_bmp_de == 1'b1;
end
6'b10_0001 :begin
if(special_flag)begin
r_wr_buffer_link0_en <= #1 r_wr_pingpong_flag_cnt_1 == 2'd0 & r_bmp_de_expend == 1'b1 ;
r_wr_buffer_link1_en <= #1 r_wr_pingpong_flag_cnt_1 == 2'd0 & r_bmp_de_expend == 1'b1 ;
r_wr_buffer_link2_en <= #1 r_wr_pingpong_flag_cnt_1 == 2'd1 & r_bmp_de_expend == 1'b1 ;
r_wr_buffer_link3_en <= #1 r_wr_pingpong_flag_cnt_1 == 2'd1 & r_bmp_de_expend == 1'b1 ;
end
else begin
r_wr_buffer_link0_en <= #1 r_wr_pingpong_flag_cnt == 2'd0 & pic_bmp_de == 1'b1 ;
r_wr_buffer_link1_en <= #1 r_wr_pingpong_flag_cnt == 2'd0 & pic_bmp_de == 1'b1 ;
r_wr_buffer_link2_en <= #1 r_wr_pingpong_flag_cnt == 2'd1 & pic_bmp_de == 1'b1 ;
r_wr_buffer_link3_en <= #1 r_wr_pingpong_flag_cnt == 2'd1 & pic_bmp_de == 1'b1 ;
end
end
6'b01_0001 : begin
if(special_mode) begin
r_wr_buffer_link0_en <= #1 (r_wr_pingpong_flag_cnt == 2'd0 & r_wr_bmp_en == 1'b1) || (r_wr_bmp_en == 1'b1 & r_wr_pingpong_flag_cnt == 2'd1 & r_hsd_pix_cnt == 1);
r_wr_buffer_link1_en <= #1 (r_wr_pingpong_flag_cnt == 2'd1 & r_wr_bmp_en == 1'b1) || (r_wr_bmp_en == 1'b1 & r_wr_pingpong_flag_cnt == 2'd0 & r_hsd_pix_cnt == r_TCOM_hsd_de_num);
r_wr_buffer_link2_en <= #1 (r_wr_pingpong_flag_cnt == 2'd0 & r_wr_bmp_en == 1'b1) || (r_wr_bmp_en == 1'b1 & r_wr_pingpong_flag_cnt == 2'd1 & r_hsd_pix_cnt == 1);
r_wr_buffer_link3_en <= #1 (r_wr_pingpong_flag_cnt == 2'd1 & r_wr_bmp_en == 1'b1) || (r_wr_bmp_en == 1'b1 & r_wr_pingpong_flag_cnt == 2'd0 & r_hsd_pix_cnt == r_TCOM_hsd_de_num);
end
else begin
r_wr_buffer_link0_en <= #1 r_wr_pingpong_flag_cnt == 2'd0 & r_wr_bmp_en == 1'b1;
r_wr_buffer_link1_en <= #1 r_wr_pingpong_flag_cnt == 2'd1 & r_wr_bmp_en == 1'b1;
r_wr_buffer_link2_en <= #1 r_wr_pingpong_flag_cnt == 2'd0 & r_wr_bmp_en == 1'b1;
r_wr_buffer_link3_en <= #1 r_wr_pingpong_flag_cnt == 2'd1 & r_wr_bmp_en == 1'b1;
end
end
6'b11_0001 :begin
if(special_flag)begin
r_wr_buffer_link0_en <= #1 r_wr_pingpong_flag_cnt_1 == 2'd0 & r_bmp_de_expend == 1'b1 ;
r_wr_buffer_link1_en <= #1 r_wr_pingpong_flag_cnt_1 == 2'd0 & r_bmp_de_expend == 1'b1 ;
r_wr_buffer_link2_en <= #1 r_wr_pingpong_flag_cnt_1 == 2'd1 & r_bmp_de_expend == 1'b1 ;
r_wr_buffer_link3_en <= #1 r_wr_pingpong_flag_cnt_1 == 2'd1 & r_bmp_de_expend == 1'b1 ;
end
else begin
r_wr_buffer_link0_en <= #1 r_wr_pingpong_flag_cnt == 2'd0 & pic_bmp_de == 1'b1;
r_wr_buffer_link1_en <= #1 r_wr_pingpong_flag_cnt == 2'd0 & pic_bmp_de == 1'b1;
r_wr_buffer_link2_en <= #1 r_wr_pingpong_flag_cnt == 2'd1 & pic_bmp_de == 1'b1;
r_wr_buffer_link3_en <= #1 r_wr_pingpong_flag_cnt == 2'd1 & pic_bmp_de == 1'b1;
end
end
endcase
end
//写缓冲FIFO数据
always @(posedge lvds_sysClk) begin
case(r_bmp_link_mode)
6'b10_0010 : begin
r_wr_buffer_link_dat <= #1 {pid_bmp_data0,pid_bmp_data1,pid_bmp_data2,pid_bmp_data3};
end
6'b01_0001 : begin
r_wr_buffer_link_dat <= #1 {r_bmp_data0,r_bmp_data1,pid_bmp_data0,pid_bmp_data1};
end
6'b11_0001 : begin
if(special_flag)begin
r_wr_buffer_link_dat <= #1 r_wr_buffer_link_dat_1;
r_wr_buffer_link_dat_temp <= #1 r_wr_buffer_link_dat_1_temp;
end else begin
r_wr_buffer_link_dat <= #1 {pid_bmp_data0,pid_bmp_data1,pid_bmp_data2,pid_bmp_data3};
r_wr_buffer_link_dat_temp <= #1 {pid_bmp_data4,pid_bmp_data5,pid_bmp_data6,pid_bmp_data7};
end
end
6'b10_0001 : begin
if(special_flag)begin
r_wr_buffer_link_dat <= r_wr_buffer_link_dat_1;
end
else begin
r_wr_buffer_link_dat <= #1 {pid_bmp_data0,pid_bmp_data1,pid_bmp_data2,pid_bmp_data3};
end
end
endcase
end
///////////////////////////////////////////////////////////////////////////////////////////////////////////
//// ///
//// 数据缓存 ///
//// ///
///////////////////////////////////////////////////////////////////////////////////////////////////////////
//LINK 0
remapping_fifo_120_to_120 remapping_fifo_120_to_120_link0 (
.clk (lvds_sysClk),
.srst (r_wr_buffer_rst),
.din (r_wr_buffer_link_dat),
.wr_en (r_wr_buffer_link0_en),
.rd_en (r_rd_buffer_link0_en),
.dout (w_rd_buffer_link0_dat),
.full (),
.empty (w_rd_empty0)
);
//LINK 1
remapping_fifo_120_to_120 remapping_fifo_120_to_120_link1 (
.clk (lvds_sysClk),
.srst (r_wr_buffer_rst),
.din (r_wr_buffer_link_dat),
.wr_en (r_wr_buffer_link1_en),
.rd_en (r_rd_buffer_link1_en),
.dout (w_rd_buffer_link1_dat),
.full (),
.empty (w_rd_empty1)
);
//LINK 2
remapping_fifo_120_to_120 remapping_fifo_120_to_120_link2 (
.clk (lvds_sysClk),
.srst (r_wr_buffer_rst),
.din (r_wr_buffer_link_dat),
.wr_en (r_wr_buffer_link2_en),
.rd_en (r_rd_buffer_link2_en),
.dout (w_rd_buffer_link2_dat),
.full (),
.empty (w_rd_empty2)
);
//LINK 3
remapping_fifo_120_to_120 remapping_fifo_120_to_120_link3 (
.clk (lvds_sysClk),
.srst (r_wr_buffer_rst),
.din (r_wr_buffer_link_dat),
.wr_en (r_wr_buffer_link3_en),
.rd_en (r_rd_buffer_link3_en),
.dout (w_rd_buffer_link3_dat),
.full (),
.empty (w_rd_empty3)
);
`ifdef eightlane
//LINK 4
remapping_fifo_120_to_120 remapping_fifo_120_to_120_link4 (
.clk (lvds_sysClk),
.srst (r_wr_buffer_rst),
.din (r_wr_buffer_link_dat_temp),
.wr_en (r_wr_buffer_link0_en),
.rd_en (r_rd_buffer_link0_en),
.dout (w_rd_buffer_link4_dat),
.full (),
.empty ()
);
//LINK 5
remapping_fifo_120_to_120 remapping_fifo_120_to_120_link5 (
.clk (lvds_sysClk),
.srst (r_wr_buffer_rst),
.din (r_wr_buffer_link_dat_temp),
.wr_en (r_wr_buffer_link1_en),
.rd_en (r_rd_buffer_link1_en),
.dout (w_rd_buffer_link5_dat),
.full (),
.empty ()
);
//LINK 6
remapping_fifo_120_to_120 remapping_fifo_120_to_120_link6 (
.clk (lvds_sysClk),
.srst (r_wr_buffer_rst),
.din (r_wr_buffer_link_dat_temp),
.wr_en (r_wr_buffer_link2_en),
.rd_en (r_rd_buffer_link2_en),
.dout (w_rd_buffer_link6_dat),
.full (),
.empty ()
);
//LINK 7
remapping_fifo_120_to_120 remapping_fifo_120_to_120_link7 (
.clk (lvds_sysClk),
.srst (r_wr_buffer_rst),
.din (r_wr_buffer_link_dat_temp),
.wr_en (r_wr_buffer_link3_en),
.rd_en (r_rd_buffer_link3_en),
.dout (w_rd_buffer_link7_dat),
.full (),
.empty ()
);
`endif
always @(posedge lvds_sysClk) begin
r_wr_buffer_rst <= #1 pic_bmp_vsync == 1'b0;
end
always @(posedge lvds_sysClk) begin
if(!pic_bmp_de & r_bmp_de)
rd_flag <= #1 1'b1 ;
else if(vs_cnt == r_vsd_de_num && (!pic_bmp_hsync & r_bmp_hsync))
rd_flag <= #1 1'b0 ;
end
always @(posedge lvds_sysClk) begin
if(!rd_flag)
vs_cnt <= #1 13'b0 ;
else if(pic_bmp_hsync & !r_bmp_hsync) begin
if(vs_cnt == r_vsd_de_num)
vs_cnt <= #1 r_vsd_de_num ;
else
vs_cnt <= #1 vs_cnt + 1 ;
end
end
always @(posedge lvds_sysClk) begin
remap_de <= pic_link_division_pattern_de;
remap_de1 <= remap_de;
remap_de2 <= remap_de1;
remap_de3 <= remap_de2;
remap_de4 <= remap_de3;
end
always @(posedge lvds_sysClk) begin
if(!remap_de)
hs_cnt <= #1 13'b0 ;
else if(hs_cnt == r_hsd_de_num - 1)
hs_cnt <= #1 13'b0 ;
else
hs_cnt <= #1 hs_cnt + 1 ;
end
//读buffer使能
always @(posedge lvds_sysClk) begin
case(r_bmp_link_mode)
6'b10_0001 : begin //4link 2fenpin
r_rd_buffer_link0_en <= #1 remap_de& !fifo_out_cnt[0];
r_rd_buffer_link1_en <= #1 remap_de& !fifo_out_cnt[0];
r_rd_buffer_link2_en <= #1 remap_de& !fifo_out_cnt[0];
r_rd_buffer_link3_en <= #1 remap_de& !fifo_out_cnt[0];
end
6'b10_0010 : begin //4link 4fenpin
r_rd_buffer_link0_en <= #1 remap_de & fifo_outto_cnt==2'd2;
r_rd_buffer_link1_en <= #1 remap_de & fifo_outto_cnt==2'd2;
r_rd_buffer_link2_en <= #1 remap_de & fifo_outto_cnt==2'd2;
r_rd_buffer_link3_en <= #1 remap_de & fifo_outto_cnt==2'd2;
end
6'b01_0001 : begin
if(special_mode)begin
r_rd_buffer_link0_en <= #1 ((remap_de || remap_de4)& fifo_outto_cnt==2'd2);
r_rd_buffer_link1_en <= #1 ((remap_de || remap_de4)& fifo_outto_cnt==2'd2);
r_rd_buffer_link2_en <= #1 ((remap_de || remap_de4)& fifo_outto_cnt==2'd2);
r_rd_buffer_link3_en <= #1 ((remap_de || remap_de4)& fifo_outto_cnt==2'd2);
end //2link 2fenpin
else begin
r_rd_buffer_link0_en <= #1 remap_de& fifo_outto_cnt==2'd2;
r_rd_buffer_link1_en <= #1 remap_de& fifo_outto_cnt==2'd2;
r_rd_buffer_link2_en <= #1 remap_de& fifo_outto_cnt==2'd2;
r_rd_buffer_link3_en <= #1 remap_de& fifo_outto_cnt==2'd2;
end
end
6'b11_0001 : begin //8link 2fenpin
r_rd_buffer_link0_en <= #1 remap_de& !fifo_out_cnt[0];
r_rd_buffer_link1_en <= #1 remap_de& !fifo_out_cnt[0];
r_rd_buffer_link2_en <= #1 remap_de& !fifo_out_cnt[0];
r_rd_buffer_link3_en <= #1 remap_de& !fifo_out_cnt[0];
end
endcase
end
always @(posedge lvds_sysClk) begin
if(r_bmp_link_mode == 6'b10_0010 || r_bmp_link_mode == 6'b10_0001|| r_bmp_link_mode == 6'b01_0001|| r_bmp_link_mode == 6'b11_0001) begin
if(!remap_de)
fifo_out_cnt <= 0 ;
else
fifo_out_cnt <= fifo_out_cnt + 1 ;
end else
fifo_out_cnt <= 0 ;
end
always @(posedge lvds_sysClk) begin
if(((!(remap_de || remap_de4)) && special_mode) || (!remap_de && !special_mode))
fifo_outto_cnt <= 1'b0;
else if (fifo_outto_cnt==2'd3)
fifo_outto_cnt <= 1'b0;
else
fifo_outto_cnt <= fifo_outto_cnt+1'b1;
end
always @(posedge lvds_sysClk) begin
fifo_out_cnt_dly <= #1 fifo_out_cnt ;
end
//将输入的link参数延迟一个时钟周期
always @(posedge lvds_sysClk) begin
r_bmp_link_de <= #1 ((remap_de || remap_de4) && special_mode) || (!special_mode && remap_de);
r_bmp_link_hsync <= #1 pic_link_division_pattern_hsync;
r_bmp_link_vsync <= #1 pic_link_division_pattern_vsync;
r_bmp_link_de_dly <= #1 r_bmp_link_de;
r_bmp_link_hsync_dly <= #1 r_bmp_link_hsync;
r_bmp_link_vsync_dly <= #1 r_bmp_link_vsync;
end
always @(posedge lvds_sysClk) begin
case(r_bmp_link_mode)
6'b10_0010: begin
if(fifo_outto_cnt==2'd0)begin
r_sel_4TCOM_link0_bmp_dat <= #1 w_rd_buffer_link0_dat[119:90];
r_sel_4TCOM_link1_bmp_dat <= #1 w_rd_buffer_link1_dat[119:90];
r_sel_4TCOM_link2_bmp_dat <= #1 w_rd_buffer_link2_dat[119:90];
r_sel_4TCOM_link3_bmp_dat <= #1 w_rd_buffer_link3_dat[119:90];
end
if(fifo_outto_cnt==2'd1)begin
r_sel_4TCOM_link0_bmp_dat <= #1 w_rd_buffer_link0_dat[89:60];
r_sel_4TCOM_link1_bmp_dat <= #1 w_rd_buffer_link1_dat[89:60];
r_sel_4TCOM_link2_bmp_dat <= #1 w_rd_buffer_link2_dat[89:60];
r_sel_4TCOM_link3_bmp_dat <= #1 w_rd_buffer_link3_dat[89:60];
end
if(fifo_outto_cnt==2'd2)begin
r_sel_4TCOM_link0_bmp_dat <= #1 w_rd_buffer_link0_dat[59:30];
r_sel_4TCOM_link1_bmp_dat <= #1 w_rd_buffer_link1_dat[59:30];
r_sel_4TCOM_link2_bmp_dat <= #1 w_rd_buffer_link2_dat[59:30];
r_sel_4TCOM_link3_bmp_dat <= #1 w_rd_buffer_link3_dat[59:30];
end
if(fifo_outto_cnt==2'd3)begin
r_sel_4TCOM_link0_bmp_dat <= #1 w_rd_buffer_link0_dat[29:0];
r_sel_4TCOM_link1_bmp_dat <= #1 w_rd_buffer_link1_dat[29:0];
r_sel_4TCOM_link2_bmp_dat <= #1 w_rd_buffer_link2_dat[29:0];
r_sel_4TCOM_link3_bmp_dat <= #1 w_rd_buffer_link3_dat[29:0];
end
end
6'b01_0001: begin
if(fifo_outto_cnt==2'd0)begin
r_sel_2TCOM_link0_bmp_dat <= #1 w_rd_buffer_link0_dat[119:90];
r_sel_2TCOM_link1_bmp_dat <= #1 w_rd_buffer_link1_dat[119:90];
end
if(fifo_outto_cnt==2'd1)begin
r_sel_2TCOM_link0_bmp_dat <= #1 w_rd_buffer_link0_dat[89:60];
r_sel_2TCOM_link1_bmp_dat <= #1 w_rd_buffer_link1_dat[89:60];
end
if(fifo_outto_cnt==2'd2)begin
r_sel_2TCOM_link0_bmp_dat <= #1 w_rd_buffer_link0_dat[59:30];
r_sel_2TCOM_link1_bmp_dat <= #1 w_rd_buffer_link1_dat[59:30];
end
if(fifo_outto_cnt==2'd3)begin
r_sel_2TCOM_link0_bmp_dat <= #1 w_rd_buffer_link0_dat[29:0];
r_sel_2TCOM_link1_bmp_dat <= #1 w_rd_buffer_link1_dat[29:0];
end
end
6'b10_0001: begin
if(remap_de)begin
if(!fifo_out_cnt[0] ) begin
r_sel_4TCOM_link0_bmp_dat <=#1 w_rd_buffer_link0_dat[119:90];
r_sel_4TCOM_link1_bmp_dat <=#1 w_rd_buffer_link0_dat[89:60];
r_sel_4TCOM_link2_bmp_dat <=#1 w_rd_buffer_link2_dat[119:90];
r_sel_4TCOM_link3_bmp_dat <=#1 w_rd_buffer_link2_dat[89:60];
end
else if (fifo_out_cnt[0]) begin
r_sel_4TCOM_link0_bmp_dat <=#1 w_rd_buffer_link0_dat[59:30];
r_sel_4TCOM_link1_bmp_dat <=#1 w_rd_buffer_link0_dat[29:0];
r_sel_4TCOM_link2_bmp_dat <=#1 w_rd_buffer_link2_dat[59:30];
r_sel_4TCOM_link3_bmp_dat <=#1 w_rd_buffer_link2_dat[29:0];
end
end
end
//6'b10_0001: begin
// if(remap_de)begin
// if(!fifo_out_cnt[0] ) begin
// r_sel_4TCOM_link0_bmp_dat <=#1 w_rd_buffer_link0_dat[119:90];
// r_sel_4TCOM_link1_bmp_dat <=#1 w_rd_buffer_link0_dat[89:60] ;
// r_sel_4TCOM_link2_bmp_dat <=#1 w_rd_buffer_link2_dat[59:30];
// r_sel_4TCOM_link3_bmp_dat <=#1 w_rd_buffer_link2_dat[29:0] ;
// end
// else if (fifo_out_cnt[0]) begin
// r_sel_4TCOM_link0_bmp_dat <=#1 w_rd_buffer_link0_dat[59:30];
// r_sel_4TCOM_link1_bmp_dat <=#1 w_rd_buffer_link0_dat[29:0];
// r_sel_4TCOM_link2_bmp_dat <=#1 w_rd_buffer_link2_dat[119:90];
// r_sel_4TCOM_link3_bmp_dat <=#1 w_rd_buffer_link2_dat[89:60] ;
//
// end
// end
// end
6'b11_0001:begin
if(!fifo_out_cnt[0] ) begin
r_sel_8TCOM_link0_bmp_dat <= #1 w_rd_buffer_link0_dat[119:90];
r_sel_8TCOM_link1_bmp_dat <= #1 w_rd_buffer_link0_dat[89:60];
r_sel_8TCOM_link2_bmp_dat <= #1 w_rd_buffer_link0_dat[59:30];
r_sel_8TCOM_link3_bmp_dat <= #1 w_rd_buffer_link0_dat[29:0];
r_sel_8TCOM_link4_bmp_dat <= #1 w_rd_buffer_link3_dat[119:90];
r_sel_8TCOM_link5_bmp_dat <= #1 w_rd_buffer_link3_dat[89:60];
r_sel_8TCOM_link6_bmp_dat <= #1 w_rd_buffer_link3_dat[59:30];
r_sel_8TCOM_link7_bmp_dat <= #1 w_rd_buffer_link3_dat[29:0];
end
else if(fifo_out_cnt[0]) begin
r_sel_8TCOM_link0_bmp_dat <= #1 w_rd_buffer_link4_dat[119:90];
r_sel_8TCOM_link1_bmp_dat <= #1 w_rd_buffer_link4_dat[89:60];
r_sel_8TCOM_link2_bmp_dat <= #1 w_rd_buffer_link4_dat[59:30];
r_sel_8TCOM_link3_bmp_dat <= #1 w_rd_buffer_link4_dat[29:0];
r_sel_8TCOM_link4_bmp_dat <= #1 w_rd_buffer_link7_dat[119:90];
r_sel_8TCOM_link5_bmp_dat <= #1 w_rd_buffer_link7_dat[89:60];
r_sel_8TCOM_link6_bmp_dat <= #1 w_rd_buffer_link7_dat[59:30];
r_sel_8TCOM_link7_bmp_dat <= #1 w_rd_buffer_link7_dat[29:0];
end
end
endcase
end
//根据输入的模式标志选择输出数据
always @(posedge lvds_sysClk) begin
casex(r_bmp_link_mode)
6'bxx_0000: begin
poc_bmp_link_de <= #1 r_bmp_de ;
poc_bmp_link_hsync <= #1 r_bmp_hsync ;
poc_bmp_link_vsync <= #1 r_bmp_vsync ;
pod_bmp_data_link0 <= #1 r_bmp_data0 ;
pod_bmp_data_link1 <= #1 r_bmp_data1 ;
pod_bmp_data_link2 <= #1 r_bmp_data2 ;
pod_bmp_data_link3 <= #1 r_bmp_data3 ;
pod_bmp_data_link4 <= #1 r_bmp_data4 ;
pod_bmp_data_link5 <= #1 r_bmp_data5 ;
pod_bmp_data_link6 <= #1 r_bmp_data6 ;
pod_bmp_data_link7 <= #1 r_bmp_data7 ;
end
6'b10_0010, 6'b01_0010,6'b10_0001: begin
poc_bmp_link_de <= #1 r_bmp_link_de ;
poc_bmp_link_hsync <= #1 r_bmp_link_hsync ;
poc_bmp_link_vsync <= #1 r_bmp_link_vsync ;
pod_bmp_data_link0 <= #1 r_sel_4TCOM_link0_bmp_dat ;
pod_bmp_data_link1 <= #1 r_sel_4TCOM_link1_bmp_dat ;
pod_bmp_data_link2 <= #1 r_sel_4TCOM_link2_bmp_dat ;
pod_bmp_data_link3 <= #1 r_sel_4TCOM_link3_bmp_dat ;
end
6'b01_0001: begin
poc_bmp_link_de <= #1 r_bmp_link_de ;
poc_bmp_link_hsync <= #1 r_bmp_link_hsync ;
poc_bmp_link_vsync <= #1 r_bmp_link_vsync ;
pod_bmp_data_link0 <= #1 r_sel_2TCOM_link0_bmp_dat ;
pod_bmp_data_link1 <= #1 r_sel_2TCOM_link1_bmp_dat ;
pod_bmp_data_link2 <= #1 r_sel_2TCOM_link0_bmp_dat ;
pod_bmp_data_link3 <= #1 r_sel_2TCOM_link1_bmp_dat ;
end
6'b11_0001: begin
poc_bmp_link_de <= #1 r_bmp_link_de ;
poc_bmp_link_hsync <= #1 r_bmp_link_hsync ;
poc_bmp_link_vsync <= #1 r_bmp_link_vsync ;
pod_bmp_data_link0 <= #1 r_sel_8TCOM_link0_bmp_dat ;
pod_bmp_data_link1 <= #1 r_sel_8TCOM_link1_bmp_dat ;
pod_bmp_data_link2 <= #1 r_sel_8TCOM_link2_bmp_dat ;
pod_bmp_data_link3 <= #1 r_sel_8TCOM_link3_bmp_dat ;
pod_bmp_data_link4 <= #1 r_sel_8TCOM_link4_bmp_dat ;
pod_bmp_data_link5 <= #1 r_sel_8TCOM_link5_bmp_dat ;
pod_bmp_data_link6 <= #1 r_sel_8TCOM_link6_bmp_dat ;
pod_bmp_data_link7 <= #1 r_sel_8TCOM_link7_bmp_dat ;
end
endcase
end
endmodule
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