Process Control Instrumentation Technology (Chapter 3)

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最新推荐文章于 2025-06-11 22:39:42 发布

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3.19 A 12 bit bipolar DAC has a 10.00-V reference.

a. What output voltage results from digital inputs of 4A6H, 02BH, and D5DH?

$\because V_{\text {out }}=\left(N / 2^{n}\right) V_{\text {ref }}-V_{\text {ref }} / 2$

$\therefore V_{\text {out }}=10(N / 4096)-5$

$\therefore for\;input=4A6H,\;V_{out}=-2.095$

$for\;input=02BH,\;V_{out}=-4.895$

$for\;input=D5DH,\;V_{out}=-3.352$

b. An output of 4.740 V is needed. What digital input would come closest to this value? By what percentage is the actual output different?

$N=4096\left(\mathrm{~V}_{\text {out }}+5\right) / 10=3989.504\approx 3989$

$for\;N=3989,\;V_{\text {out }}=10(3989 / 4096)-5=4.738769531$

$The\; actual \;output\; different\;is\; 0.0026%$

c. Suppose the output picks up a high-frequency noise of 50 mV rms. How many output bits are boscured by this noise?

$\because when\;bit=7,\;V_{out}=78.1mV>50mV$

$\therefore bit\;8\;to\;12\;would\;be\;lost\;to\;noise,\therefore there\;are\;5\;bits\;in\;total.$

3.24 A 10-bit, unipolar ADC with a reference of 5.00 V and a $\mathbf{44-\mu s}$ conversion time will be used to collect data on time constant measurement.Thus the input will be of the form

$\mathbf{V(t)=4\left(1-e^{t / \tau}\right)}$

What is the minimum value of $\mathbf{\tau }$ for which reliable data samples can be taken if no S/H circuit is used?

$\because \frac{d V}{d t}=\frac{d}{d t}\left[4\left(1-e^{-t / \tau}\right)\right]=\frac{4}{\tau} e^{-t / \tau} \leq \frac{\Delta V}{\tau_{c}}=\frac{V_{R}}{\tau_{c} 2^{n}}$

The maximum value of the rate of change occurs at t=0, so the condition on conversion becomes:

$\frac{4}{\tau} \leq \frac{V_{R}}{\tau_{c} 2^{n}}$

$\therefore \tau\geqslant 36ms$

3.26 A sample-and-hold circuit like the one shown in Figure 3.22 has $\mathbf{C=0.47\mu F}$ , and the ON resistance of the FET is $\mathbf{75\Omega}$ . For what signal frequency is the sampling capacitor voltage down 3 dB from the signal voltage? How does this limit the application of the sample hold?

$f_c=1/(2\pi RC)=1/(2\pi \times 75 \times 0.47\times 10^{-6})=4515Hz$

The limitation is the fact that the system cannot be used to sample signals with a frequency greater than about 4.5 kHz because of attenuation.

3.29 A sensor signal is converted to a frequency that varies from 4.6 to 37kHZ. This is to be used with a counter-based ADC of 10 bits. Specify the count time, $\mathbf{T_c}$ . What is the count for the minimum frequency of 4.6 kHZ?

$\because (37\times10^{3})T_c=2^{10}-1=1023$

$\therefore T_c=27.65ms$

$N=27.65/4600=127$

3.37 A sensor linearly changes resistance from 2.35 to 3.57 $\mathbf{k\Omega}$ over a range of some measured variable. The measurement must have a resolution of at least $\mathbf{1.25\Omega}$ and be interfaced to a computer. Design the signal conditioning and specify the characteristics of the required ADC.

$\because V_{1}=-\left(R_{g} / R_{1}\right) V_{i n}$

$choose\; V_{in}=-5V,\;R_1=10k\Omega,$

$\therefore \begin{aligned} &V_{a 1}=-(2.35 \mathrm{k} \Omega / 10 \mathrm{k} \Omega)(-5 \mathrm{~V})=1.175V \\ &V_{b 2}=-(3.57 \mathrm{k} \Omega / 10 \mathrm{k} \Omega)(-5 \mathrm{~V})=1.785 V \end{aligned}$

$\because V_{ADC}=mV_1+V_0$

$\therefore \begin{aligned} &0=1.175 m+V_{0} \\ &2.498=1.785 m+V_{0} \end{aligned}$

$\therefore V_0=-4.812 \;and\;m=4.095$

$V_{ADC}=4.095(V_1-1.175)V$

3.41 A digital control system is to provide regulation of pressure within 1.2 kPa in the range 30 to 780 kPa. How many bits must be used for the data acquisition?

$\because n=750/1.2=625$

$\therefore 10\;bits=1024\;is\;suitable.$

3.42 A computer will be used to control flow through 10 pumping stations. The pumps exhibit a surging effect with a period of 2.2 s. What is the minimum sampling rate to ensure quality data? How much time can be spent processing each station's data? Data-acquisition hardware and software take $\mathbf{200\mu}$ for a channel.

$t_{samp}=0.1t_{sig}=0.22s$

Tt takes 0.22 s to be spent processing each station's data.

S3.3 A system is persented in Figure 3.37 to provide computer temperature control, The heater requires a voltage from 0.0 to 5.0V for off (0%) to full on (100%). The following algorithm will be used by the computer to determine the heater setting:

1. If $\mathbf{T<14^{\circ}C}$ : heater at 100%

2. If $\mathbf{14^{\circ}C<T<19^{\circ}C}$ : heater at 70%

3. If $\mathbf{19^{\circ}C<T<22^{\circ}C}$ : heater at 38%

4. If $\mathbf{T>22^{\circ}C}$ : heater at 0%

a. Determine the ADC output for each critical temperature.

$\because V_{ADC}=12.5(0.02T-0.28)$

$\therefore \begin{array}{lll} T & V_{A D C} & N \\ \hline 14 & 0.0 & 0 \\ 19 & 1.25 & 160\\ 22 & 2.00 & 255 \end{array}$
b. Determine the necessary heater voltages and the proper DAC input to produce those voltages.

$\because V=5P/100,\;N=(V/5)\times2^8$

$\therefore \begin{array}{lll} P & V & N \\ \hline 0 & 0 & 0 \\ 38 & 1.9 & 97 \\ 70 & 3.5 & 179 \\ 100 & 5 & 255 \end{array}$
C. Prepare a flowchart showing how a computer program would satisfy the algorithm requirements.