Hi3516A用spi flash出现*** Warning - bad CRC, using default environment

最新推荐文章于 2024-11-18 20:47:31 发布
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本文记录了作者在调试Hi3516A开发板过程中遇到的问题及解决方法，包括硬件配置疑问、uboot烧录后CRC错误警告及解决步骤。

最近在调Hi3516A的板，硬件不知道为什么如此设计，用一片16bit4G的ddr，16Mspi flash，按理如果是A应该是2片16bit的ddr，组成32位总线，现在怕是只能当D来用了，编译成功后，烧录uboot后，出现*** Warning - bad CRC, using default environment，尝试用setenv改变量，sa也提示成功，但reset后问题还是一样，折腾了二天，最后参考下面的才解决。

 

http://www.bubuko.com/infodetail-2118134.html

U-Boot 2010.06 (Jan 05 2018 - 12:08:26)

Check spi flash controller v350... Found
Spi(cs1) ID: 0xC2 0x20 0x18 0xC2 0x20 0x18
Spi(cs1): Block:64KB Chip:16MB Name:"KH25L12835F"
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Hit any key to stop autoboot:  0
uboOT#
uboOT#

把uboot和kernel下drivers\mtd\spi\hisfc350\hisfc350_spi_ids.c的文件，定义一个CONFIG_CLOSE_SPI_8PIN_4IO

#define CONFIG_CLOSE_SPI_8PIN_4IO

按理demo板也是用的spi nor flash,先调试别的以后再看看为什么这样，

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报错1： /* 擦除 */ tiangong1 # nand erase.chip NAND erase.chip: device 0 whole chip Erasing at 0xffe0000 -- 100% complete. OK /* esbc */ tiangong1 # bootmenu *** U-Boot Boot Menu *** update rootfs.rw update rootfs.ro update fwk update kernel.images update uboot update esbc reboot uboot update fwk.squashfs U-Boot console Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit hsan_mac gemac2@2: gemac2@2 link up, Speed: 1000, full Using pie device TFTP from server 192.168.0.10; our IP address is 192.168.0.1 Filename 'hi_esbc.bin'. Load address: 0x86000000 Loading: ################ 6.7 MiB/s done Bytes transferred = 77004 (12ccc hex) Erasing 0x00000000 ... 0x0007ffff (4 eraseblock(s)) Writing 77004 byte(s) at offset 0x00000000 Size not on a page boundary (0x800), rounding to 0x13000 /* uboot.bin */ tiangong1 # *** U-Boot Boot Menu *** update rootfs.rw update rootfs.ro update fwk update kernel.images update uboot update esbc reboot uboot update fwk.squashfs U-Boot console Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit hsan_mac gemac2@2: gemac2@2 link up, Speed: 1000, full Using pie device TFTP from server 192.168.0.10; our IP address is 192.168.0.1 Filename 'hi_uboot.bin'. Load address: 0x86000000 Loading: ################################################################# ################################ 7.9 MiB/s done Bytes transferred = 495132 (78e1c hex) Erasing 0x00000000 ... 0x000fffff (8 eraseblock(s)) Writing 495132 byte(s) at offset 0x00000000 Size not on a page boundary (0x800), rounding to 0x79000 Erasing 0x00000000 ... 0x000fffff (8 eraseblock(s)) Writing 495132 byte(s) at offset 0x00000000 Size not on a page boundary (0x800), rounding to 0x79000 /* reset */ tiangong1 # re resetting ... reset_cpu hi-esbc start boot_info.value a0000..... boot mode 2...... match board TG1C0D8_TYPE1, board_id_val 412121 sec init spi hw init succ �up��0_ boot_info.value a0000..... flash boot mode ...... hi_nand_probe...... Nand Spec : Block[20000B] Page[800B] OOB[40B] page_shift[0b] read_addr_cycle[05] read_if_type[00] read_dummy_num[01] read_cmd[03] uboot_region_size [100000]...... This boot is main region 0 area...... nand read oob: offset 0x80000 nand read: offset 0x80000 size 0x1000 to addr 0x17512cd0 nand read oob: offset 0x80000 nand read oob: offset 0x80000 nand read: offset 0x81000 size 0x100 to addr 0x17513cd0 nand read oob: offset 0x80000 nand read oob: offset 0x80000 nand read: offset 0x81100 size 0x1bf0 to addr 0x17513dd0 normal boot...... no secure boot, dont check sign...... no secure boot, dont check code image..... start ddrinit from addr 17513dd0 ddrinit finish This boot is main region 0 area...... nand read oob: offset 0x80000 nand read oob: offset 0x80000 nand read: offset 0x82cf0 size 0x1000 to addr 0x80100f00 nand read oob: offset 0x80000 nand read oob: offset 0x80000 nand read: offset 0x83cf0 size 0x100 to addr 0x80101f00 nand read oob: offset 0x80000 nand read oob: offset 0x80000 nand read oob: offset 0xa0000 nand read oob: offset 0xc0000 nand read oob: offset 0xe0000 nand read: offset 0x83df0 size 0x7502c to addr 0x80102000 dont decrypt boot code...... no secure boot, dont check sign...... no secure boot, dont check code image..... check nvcnt...... check version start...... There is no version in efuse dice not support...... subkey_id = 0x00 esbc_mask = 0x01 bl_nvcnt = 0x01 start to uboot...... U-Boot 2022.07 (Aug 28 2025 - 11:08:19 +0800) for tiangong1 Watchdog enabled DRAM: 224 MiB Core: 139 devices, 17 uclasses, devicetree: separate NAND: device found, Manufacturer ID: 0xc8, Chip ID: 0x92 GigaDevice GD5F2GM7UEYIGR GigaDevice GD5F2GM7UEYIGR 256 MiB, MLC, erase size: 128 KiB, page size: 2048, OOB size: 128 256 MiB Loading Environment from NAND... Scanning device for bad blocks *** Warning - bad CRC, using default environment In: uart1@10119000 Out: uart1@10119000 Err: uart1@10119000 invalid bootflag, using default Saving Environment to NAND... Erasing redundant NAND... Erasing at 0x360000 -- 100% complete. Writing to redundant NAND... OK OK Reset Info: Uboot reset cmd to reset Net: lsw_dp lsw_dp: lsw_dp probe succ lsw_pfe lsw_pfe: get reset bulk failed lsw_pfe lsw_pfe: lsw_pfe probe succ hsan_mac gemac0@0: gemac0@0 probe succ mdio_bus mdio0@0: mdio_register mdio0@0 mdio_bus mdio0@0: mdio0@0 probe succ Genius Phy hwVer:0x20669a22 fwVer:0x6e01 hsan_mac gemac1@1: gemac1@1 probe succ hsan_mac gemac2@2: gemac2@2 probe succ hsan_mac gemac3@3: gemac3@3 probe succ hsan_mac gemac@8: gemac@8 probe succ mdio_bus mdio1@1: mdio_register mdio1@1 mdio_bus mdio1@1: mdio1@1 probe succ Could not get PHY for mdio1@1: addr 1 hsan_mac gemac@8: gemac@8 no phy device hsan_pie pie: pie probe succ Warning: pie (eth0) using random MAC address - 5a:60:6c:f7:b9:c3 eth0: pie bootflag a bootreg 10 hsan_mac gemac2@2: gemac2@2 link up, Speed: 1000, full multiupg detect bootdelay is 3000 Hit any key to stop autoboot: 0 /* uboot */ tiangong1 # bootmenu *** U-Boot Boot Menu *** update rootfs.rw update rootfs.ro update fwk update kernel.images update uboot update esbc reboot uboot update fwk.squashfs U-Boot console Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit hsan_mac gemac2@2: gemac2@2 link up, Speed: 1000, full Using pie device TFTP from server 192.168.0.10; our IP address is 192.168.0.1 Filename 'hi_uboot.bin'. Load address: 0x86000000 Loading: ################################################################# ################################ 7.7 MiB/s done Bytes transferred = 495132 (78e1c hex) Erasing 0x00000000 ... 0x000fffff (8 eraseblock(s)) Writing 495132 byte(s) at offset 0x00000000 Size not on a page boundary (0x800), rounding to 0x79000 Erasing 0x00000000 ... 0x000fffff (8 eraseblock(s)) Writing 495132 byte(s) at offset 0x00000000 Size not on a page boundary (0x800), rounding to 0x79000 /* reset */ tiangong1 # re resetting ... reset_cpu hi-esbc start boot_info.value a0000..... boot mode 2...... match board TG1C0D8_TYPE1, board_id_val 412121 sec init spi hw init succ �oo��0_ boot_info.value a0000..... flash boot mode ...... hi_nand_probe...... Nand Spec : Block[20000B] Page[800B] OOB[40B] page_shift[0b] read_addr_cycle[05] read_if_type[00] read_dummy_num[01] read_cmd[03] uboot_region_size [100000]...... This boot is main region 0 area...... nand read oob: offset 0x80000 nand read: offset 0x80000 size 0x1000 to addr 0x17512cd0 [err] ECC error in page_addr: 0x80000, flash_status 00 nand read fail at 0x%08x Nand read from offset 0x80000 failed 1879048192 flash read ddrinit head [80000] fail...... flash boot fail...... hi-esbc start fail 70000000 hi-esbc start boot_info.value a0000..... boot mode 2...... match board TG1C0D8_TYPE1, board_id_val 412121 sec init spi hw init succ �e ��0_ boot_info.value a0000..... flash boot mode ...... hi_nand_probe...... Nand Spec : Block[20000B] Page[800B] OOB[40B] page_shift[0b] read_addr_cycle[05] read_if_type[00] read_dummy_num[01] read_cmd[03] uboot_region_size [100000]...... This boot is standby region 0 area...... nand read oob: offset 0x180000 nand read: offset 0x180000 size 0x1000 to addr 0x17512cd0 [err] ECC error in page_addr: 0x180000, flash_status 00 nand read fail at 0x%08x Nand read from offset 0x180000 failed 1879048192 flash read ddrinit head [180000] fail...... flash boot fail...... hi-esbc start fail 70000000 hi-esbc start boot_info.value a0000..... boot mode 2...... match board TG1C0D8_TYPE1, board_id_val 412121 sec init spi hw init succ �e ��0_ boot_info.value a0000..... flash boot mode ...... hi_nand_probe...... Nand Spec : Block[20000B] Page[800B] OOB[40B] page_shift[0b] read_addr_cycle[05] read_if_type[00] read_dummy_num[01] read_cmd[03] uboot_region_size [100000]...... This boot is main region 0 area...... nand read oob: offset 0x80000 nand read: offset 0x80000 size 0x1000 to addr 0x17512cd0 [err] ECC error in page_addr: 0x80000, flash_status 00 nand read fail at 0x%08x Nand read from offset 0x80000 failed 1879048192 flash read ddrinit head [80000] fail...... flash boot fail...... hi-esbc start fail 70000000 报错2： /* 擦除 */ tiangong1 # mtd erase nand0 Erasing 0x00000000 ... 0x0fffffff (2048 eraseblock(s)) attempt to erase a bad block at page 0x00007380 Skipping bad block at 0x039c0000 /* esbc */ tiangong1 # bootmenu *** U-Boot Boot Menu *** update rootfs.rw update rootfs.ro update fwk update kernel.images update uboot update esbc reboot uboot update fwk.squashfs U-Boot console Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit hsan_mac gemac2@2: gemac2@2 link up, Speed: 1000, full Using pie device TFTP from server 192.168.0.10; our IP address is 192.168.0.1 Filename 'hi_esbc.bin'. Load address: 0x86000000 Loading: ########### 6.6 MiB/s done Bytes transferred = 55420 (d87c hex) Erasing 0x00000000 ... 0x0007ffff (4 eraseblock(s)) Writing 55420 byte(s) at offset 0x00000000 Size not on a page boundary (0x800), rounding to 0xe000 /* uboot */ tiangong1 # *** U-Boot Boot Menu *** update rootfs.rw update rootfs.ro update fwk update kernel.images update uboot update esbc reboot uboot update fwk.squashfs U-Boot console Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit hsan_mac gemac2@2: gemac2@2 link up, Speed: 1000, full Using pie device TFTP from server 192.168.0.10; our IP address is 192.168.0.1 Filename 'hi_uboot.bin'. Load address: 0x86000000 Loading: ################################################################# ################################ 7.8 MiB/s done Bytes transferred = 495892 (79114 hex) Erasing 0x00000000 ... 0x000fffff (8 eraseblock(s)) Writing 495892 byte(s) at offset 0x00000000 Size not on a page boundary (0x800), rounding to 0x79800 Erasing 0x00000000 ... 0x000fffff (8 eraseblock(s)) Writing 495892 byte(s) at offset 0x00000000 Size not on a page boundary (0x800), rounding to 0x79800 /* reset */ tiangong1 # re resetting ... reset_cpu hi-esbc start spi hw init succ �un�� hit succ U-Boot 2022.07 (Aug 25 2025 - 19:01:33 +0800) for tiangong1 Watchdog enabled DRAM: 224 MiB Core: 140 devices, 17 uclasses, devicetree: separate NAND: device found, Manufacturer ID: 0xc8, Chip ID: 0x92 GigaDevice GD5F2GM7UEYIGR GigaDevice GD5F2GM7UEYIGR 256 MiB, MLC, erase size: 128 KiB, page size: 2048, OOB size: 128 256 MiB Loading Environment from NAND... Scanning device for bad blocks Bad eraseblock 462 at 0x0000039c0000 *** Warning - bad CRC, using default environment In: uart1@10119000 Out: uart1@10119000 Err: uart1@10119000 invalid bootflag, using default Saving Environment to NAND... Erasing redundant NAND... Erasing at 0x360000 -- 100% complete. Writing to redundant NAND... OK OK Reset Info: Uboot reset cmd to reset Net: lsw_dp lsw_dp: lsw_dp probe succ lsw_pfe lsw_pfe: lsw_pfe probe succ hsan_mac gemac0@0: gemac0@0 probe succ mdio_bus mdio0@0: mdio_register mdio0@0 mdio_bus mdio0@0: mdio0@0 probe succ Genius Phy hwVer:0x20669a22 fwVer:0x6e01 hsan_mac gemac1@1: gemac1@1 probe succ hsan_mac gemac2@2: gemac2@2 probe succ hsan_mac gemac3@3: gemac3@3 probe succ hsan_mac gemac@8: gemac@8 probe succ mdio_bus mdio1@1: mdio_register mdio1@1 mdio_bus mdio1@1: mdio1@1 probe succ Could not get PHY for mdio1@1: addr 1 hsan_mac gemac@8: gemac@8 no phy device hsan_pie pie: pie probe succ Warning: pie (eth0) using random MAC address - 96:a1:cb:b9:1c:36 eth0: pie bootflag a bootreg 10 hsan_mac gemac2@2: gemac2@2 link up, Speed: 1000, full multiupg detect bootdelay is 3000 Hit any key to stop autoboot: 0 /* uboot */ tiangong1 # bootmenu *** U-Boot Boot Menu *** update rootfs.rw update rootfs.ro update fwk update kernel.images update uboot update esbc reboot uboot update fwk.squashfs U-Boot console Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit hsan_mac gemac2@2: gemac2@2 link up, Speed: 1000, full Using pie device TFTP from server 192.168.0.10; our IP address is 192.168.0.1 Filename 'hi_uboot.bin'. Load address: 0x86000000 Loading: ################################################################# ################################ 7.3 MiB/s done Bytes transferred = 495892 (79114 hex) Erasing 0x00000000 ... 0x000fffff (8 eraseblock(s)) Writing 495892 byte(s) at offset 0x00000000 Size not on a page boundary (0x800), rounding to 0x79800 Erasing 0x00000000 ... 0x000fffff (8 eraseblock(s)) Writing 495892 byte(s) at offset 0x00000000 Size not on a page boundary (0x800), rounding to 0x79800 /* reset */ tiangong1 # re resetting ... reset_cpu hi-esbc start spi hw init succ hi-esbc start fail 70000000 hi-esbc start spi hw init succ hi-esbc start fail 70000000 hi-esbc start spi hw init succ �i ��pihi-esbc start fail 70000000 hi-esbc start spi hw init succ 以上两个报错是一样的吗？如果一样，告诉我可能的原因
最新发布
09-02
- 使用 `nand bad` 命令查看当前 NAND Flash 的坏块列表。 - 确保关键映像（ESBC、U-Boot）不写入坏块。 2. **确认映像写入地址** - 查阅芯片手册或 U-Boot 配置，确认 ESBC 和 U-Boot 的正确写入地址。 - 例如...
uboot - *** Warning - bad CRC, using default environment
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　　出现这个现象的原因环境变量存储区没有相应的数据，产生的原因可能是： 1、首次烧写uboot启动，，出现这个提示，执行saveenv 指令保存环境变量即可； 2、nor fash芯片的 基地址出错。 　　一般情况下，nor flash的物理地址就是uboot下的基地址。但是特殊芯片（比如MindSpeed 的IBR功能）uboot中地址做了二次转换，所以nor flash的基地址应...
Warning - bad CRC, using default environment问题解决
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在uboot程序中使用saveenv命令出现报错Saving Environment to SPIFlash... failed to get spi clock.， *** Warning - spi_flash_probe_bus_cs() failed, using default environment如何解决这两个报错
04-17
<think>嗯，用户遇到了Uboot中使用saveenv命令时出现两个错误：“Saving Environment to SPIFlash... failed to get spi clock”和“*** Warning - spi_flash_probe_bus_cs() failed, using default environment”。首先，我需要理解这些错误的原因。 根据引用[1]，代码中涉及到了spi_flash的结构体和相关函数，可能是在驱动初始化时出了问题。而引用[2]提到官方文档的配置可能有误，尤其是bootcmd和bootargs的设置，可能冒号使用错误导致配置无效。引用[3]则说明bootcmd的作用是启动内核，但这里的问题可能和环境变量存储有关，即SPI Flash的配置不正确。 首先，“failed to get spi clock”可能意味着SPI时钟配置不正确，可能是时钟频率没有正确设置，或者在设备树（DTS）中的配置有误。需要检查设备树中的SPI控制器节点，确认时钟相关参数是否正确，比如时钟频率、分频系数等。 其次，“spi_flash_probe_bus_cs() failed”说明在探测SPI Flash时失败，可能涉及总线编号或片选（CS）引脚配置错误。需要确认SPI总线的编号是否正确，片选引脚是否与硬件设计一致。例如，有些平台可能使用不同的总线号，或者在代码中定义的CS引脚与实际硬件不符。 另外，用户提到的官方文档可能有错误，特别是bootcmd中的冒号问题，需要检查uboot环境变量中的设置是否正确，是否有多余的冒号导致解析失败。例如，可能将“sf probe 0:0”写成了“sf probe 0 0”，或者配置参数格式不正确。 可能的解决步骤包括： 1. 检查设备树中的SPI控制器配置，确保时钟频率和分频设置正确。 2. 确认SPI Flash的总线号和片选引脚在代码中的定义是否正确，可能需要修改驱动代码中的总线号或CS值。 3. 调整uboot的环境变量，特别是sf probe命令的参数，确保格式正确，如“sf probe 0 0”而不是“0:0”。 4. 在uboot启动时检查SPI时钟的初始化流程，确认时钟驱动是否正常加载，必要时添加调试信息或检查时钟相关的驱动代码。 此外，还需要考虑硬件问题，比如SPI Flash芯片是否损坏，或者焊接不良导致通信失败。但用户的问题更可能出现在软件配置上，因此优先检查上述软件方面的配置。 最后，根据引用[2]中的解决方法，参考正确的bootcmd和bootargs配置，可能需要修改环境变量中的相关参数，确保SPI Flash被正确识别和访问。</think>### U-Boot saveenv SPI Flash报错解决方案 #### 一、问题定位与分析 两个关键报错均指向SPI Flash驱动初始化失败： 1. `failed to get spi clock` 表示时钟配置异常 2. `spi_flash_probe_bus_cs() failed` 表示总线/片选探测失败 可能原因包括： - SPI时钟频率未正确配置 - SPI总线编号或片选(CS)引脚定义错误 - 设备树(DTS)中SPI节点参数缺失 - 环境变量`sf probe`命令格式错误[^2] #### 二、具体解决步骤 ##### 1. 检查SPI时钟配置 在设备树中确认SPI控制器的时钟配置（如HIFMC100控制器）： ```dts hifmc: hifmc@10000000 { compatible = "hisilicon,hifmc100"; reg = <0x10000000 0x1000>; clocks = <&clk HIFMC_CLK>, <&clk HIFMC_EMMC_CLK>; clock-names = "hifmc", "emmc"; // 必须包含有效时钟定义 status = "okay"; }; ``` 若发现时钟分频比异常，可尝试添加显式定义： ```c // drivers/mtd/spi/hifmc100/hifmc100_spi_nor.c #define HIFMC_CLK_DIV 3 // 根据硬件手册调整分频系数 ``` ##### 2. 验证SPI总线参数 在U-Boot命令行手动执行探测命令： ``` => sf probe 0 0 // 格式应为[bus][cs] [frequency]，注意冒号问题[^2] ``` 若返回`Invalid bus 0`错误，需检查： - `CONFIG_SF_DEFAULT_BUS` 的配置值 - SPI控制器驱动注册的总线编号 - 片选引脚在`spi_flash_probe()`中的传递参数 ##### 3. 修改环境变量配置 重点检查`bootcmd`和`bootargs`中的SPI参数： ``` setenv bootcmd 'sf probe 0 0; sf read 0x82000000 0x100000 0x800000; bootm 0x82000000' // 正确格式 saveenv // 修改后保存测试 ``` ##### 4. 驱动代码调试 在`hifmc100_spi_nor_probe()`函数添加调试信息： ```c printk("SPI CLK: %dMHz\n", get_spi_clock()/1000000); if (!spi_nor_flash) { pr_err("SPI Flash init failed at CS%d\n", cs); } ``` #### 三、验证流程 1. 通过`mdio`命令检查时钟寄存器值 2. 使用`sf info`查看SPI Flash识别状态 3. 执行`sf test`进行读写测试 #### 四、典型修复案例 某Hi3518平台解决方案： ```diff // u-boot/drivers/mtd/spi/hifmc100/hifmc100_spi_nor.c - #define HIFMC_CLK_DIV 4 + #define HIFMC_CLK_DIV 2 // 将分频系数调整为硬件支持的值 // 设备树中增加显式时钟声明 &hifmc { clocks = <&clk HIFMC_CLK>, <&clk HIFMC_EMMC_CLK>; clock-frequency = <150000000>; // 明确指定时钟频率 }; ```
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