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RSS订阅原创 Mentor Graphics QuestaSim 2021 出现“正在运行后安装脚本...脚本:1/1”的问题
出现以上一直停留在这个界面的问题，是因为安装路径出现中文字符，路径设置为英文再次安装即可。
2022-04-25 18:23:08
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原创 2021-10-23
HDLBits记录Verilog LanguageModules:HierarchyModules and vectorsModule shift8Verilog LanguageModules:HierarchyModules and vectorsModule shift8This exercise is an extension of module_shift. Instead of module ports being only single pins, we now have modul
2021-10-23 14:48:47
271
原创 2021-10-23
HDLBits记录CircuitsCombinational LogicMultiplexers9-to-1 multiplexerCircuitsCombinational LogicMultiplexers9-to-1 multiplexerMux9to1vCreate a 16-bit wide, 9-to-1 multiplexer. sel=0 chooses a, sel=1 chooses b, etc. For the unused cases (sel=9 to 15), se
2021-10-23 14:31:06
276
原创 2021-10-21
HDLBits记录Verilog LanguageModules:HierarchyThree modulesVerilog LanguageModules:HierarchyThree modulesYou are given a module my_dff with two inputs and one output (that implements a D flip-flop). Instantiate three of them, then chain them together to ma
2021-10-21 21:13:50
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