Note for 20140726_SD_coding

The same as the before blog is just for myself learning. All the mateials is from one book--Digitial Singal Processing with FPGAs.

SD numbers have proven to be useful in carry-free adders or multipliers with elss complexity, because the effort in multiplication can typically be extimated through the number of nonzero elements, which can be reduced by using SD numbers.

Carry-free Addition Example

The addition of 29 to -9 in the SD system is performed below.

However, due to the ternary logic burden, implementing Table 2.2 with FPGAs requires four-input operands for the Ck and Uk. This transliates into a 2 times 8 x4-bit when implementing Table 2.2.