Note for 20140726_SD_coding

SD数在FPGA乘法器中的应用

最新推荐文章于 2025-04-28 19:54:45 发布

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本文探讨了SD数在FPGA实现的无进位加法器及乘法器中的应用。SD数能够简化乘法运算，并通过减少非零元素数量降低运算复杂度。文中还举例说明了29与-9在SD系统中的加法过程。

The same as the before blog is just for myself learning. All the mateials is from one book--Digitial Singal Processing with FPGAs.

SD numbers have proven to be useful in carry-free adders or multipliers with elss complexity, because the effort in multiplication can typically be extimated through the number of nonzero elements, which can be reduced by using SD numbers.

Carry-free Addition Example

The addition of 29 to -9 in the SD system is performed below.

However, due to the ternary logic burden, implementing Table 2.2 with FPGAs requires four-input operands for the Ck and Uk. This transliates into a 2 times 8 x4-bit when implementing Table 2.2.