rk3288 kernel-4.4 修改 mmc 编号

最新推荐文章于 2025-06-09 18:34:46 发布

mxm12

最新推荐文章于 2025-06-09 18:34:46 发布

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分类专栏： rockchip 文章标签： rockchip rk3288 mmc emmc

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本文介绍如何在RK3288设备上将EMMC编号从mmc2改回mmc0的方法，涉及修改rk3288.dtsi文件中的EMMC配置顺序。

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原来 3.0 内核, emmc 的编号是 mmc0. 到了 4.4 变成 mmc2 了.

要改回 mmc0, 只要修改 rk3288.dtsi 中 emmc 的顺序就可以了

old mode 100644
new mode 100755
index 18e6897..ac56932
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -278,6 +278,19 @@
                ports = <&vopl_out>, <&vopb_out>;
        };

+       emmc: dwmmc@ff0f0000 {
+               compatible = "rockchip,rk3288-dw-mshc";
+               clock-freq-min-max = <400000 150000000>;
+               clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+                        <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+               clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+               fifo-depth = <0x100>;
+               interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+               reg = <0x0 0xff0f0000 0x0 0x4000>;
+               status = "disabled";
+               supports-emmc;
+       };
+
        sdmmc: dwmmc@ff0c0000 {
                compatible = "rockchip,rk3288-dw-mshc";
                clock-freq-min-max = <400000 150000000>;
@@ -314,19 +327,6 @@
                status = "disabled";
        };

-       emmc: dwmmc@ff0f0000 {
:
                ports = <&vopl_out>, <&vopb_out>;
        };

+       emmc: dwmmc@ff0f0000 {
+               compatible = "rockchip,rk3288-dw-mshc";
+               clock-freq-min-max = <400000 150000000>;
+               clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+                        <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+               clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+               fifo-depth = <0x100>;
+               interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+               reg = <0x0 0xff0f0000 0x0 0x4000>;
+               status = "disabled";
+               supports-emmc;
+       };
+
        sdmmc: dwmmc@ff0c0000 {
                compatible = "rockchip,rk3288-dw-mshc";
                clock-freq-min-max = <400000 150000000>;
@@ -314,19 +327,6 @@
                status = "disabled";
        };

-       emmc: dwmmc@ff0f0000 {
-               compatible = "rockchip,rk3288-dw-mshc";
-               clock-freq-min-max = <400000 150000000>;
-               clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
-                        <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
-               clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
-               fifo-depth = <0x100>;
-               interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-               reg = <0x0 0xff0f0000 0x0 0x4000>;
-               status = "disabled";
-               supports-emmc;
-       };
-
        saradc: saradc@ff100000 {
                compatible = "rockchip,saradc";
                reg = <0x0 0xff100000 0x0 0x100>;