简单的ori指令实现

4.2.4取址阶段的实现

       取出指令存储器中的指令。PC值递增，包括IF/ID模块

      

第一步实现需要用到的宏定义

       `defineRstEnable 1'b1

`define RstDisable 1'b0

`define ZeroWord 32'h00000000

`define WriteEnable 1'b1

`define WriteDisable 1'b0

`define ReadEnable 1'b1

`define ReadDisable 1'b0

`define AluOpBus 7:0

`define AluSelBus 2:0

`define InstValid 1'b0

`define InstInvalid 1'b1

`define Stop 1'b1

`define NoStop 1'b0

`define InDelaySlot 1'b1

`define NotInDelaySlot 1'b0

`define Branch 1'b1

`define NotBranch 1'b0

`define InterruptAssert 1'b1

`define InterruptNotAssert 1'b0

`define TrapAssert 1'b1

`define TrapNotAssert 1'b0

`define True_v 1'b1

`define False_v 1'b0

`define ChipEnable 1'b1

`define ChipDisable 1'b0

 

 

//指令

`define EXE_ORI  6'b001101

 

 

`define EXE_NOP 6'b000000

 

 

//AluOp

`define EXE_OR_OP    8'b00100101

`define EXE_ORI_OP  8'b01011010

 

 

`define EXE_NOP_OP    8'b00000000

 

//AluSel

`define EXE_RES_LOGIC 3'b001

 

`define EXE_RES_NOP 3'b000

 

 

//指令存储器inst_rom

`define InstAddrBus 31:0

`define InstBus 31:0

`define InstMemNum 131071

`define InstMemNumLog2 17

 

 

//通用寄存器regfile

`define RegAddrBus 4:0

`define RegBus 31:0

`define RegWidth 32

`define DoubleRegWidth 64

`define DoubleRegBus 63:0

`define RegNum 32

`define RegNumLog2 5

`define NOPRegAddr 5'b00000

 

IF/ID模块

       其作用是暂时保存取址阶段得到的指令，以及对应的指令地址，并在下一个时钟周期传递到译码阶段

       对应的接口有：rst,clk,if_pc,if_inst,id_pc,id_inst,对应的代码模块为if_id.v文件

`include "defines.v"

 

module if_id(

 

       input      wire                                                                clk,

       inputwire                                                                     rst,

      

 

       inputwire[`InstAddrBus]                    if_pc,

       inputwire[`InstBus]          if_inst,

       outputreg[`InstAddrBus]      id_pc,

       outputreg[`InstBus]          id_inst 

      

);

 

       always@ (posedge clk) begin

              if(rst == `RstEnable) begin

                     id_pc<= `ZeroWord;

                     id_inst<= `ZeroWord;

         end else begin

                id_pc <= if_pc;

                id_inst <= if_inst;

              end

       end

 

endmodule

 

综上，if_id模块实现的原理比较简单，实现指令的缓存功能