（南京观海微电子）——GH7006-01_HKC_B3-PV043WVQ-N80_MIPI_LVDS_RGB原理及代码介绍

于 2024-10-27 09:31:19 发布
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分类专栏： 南京观海微电子 显示驱动IC 文章标签： 材质 前端
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本文链接：https://blog.youkuaiyun.com/m0_75095200/article/details/143264439
版权

1. 原理

 

2. 代码

/**************************************************/        
//        Model  - GV050WVQ-N82
//        IC     - GH7006
//        Width  - 800
//        Height - 480
//        REV:   - V01
//        DATA   - 20240621
//        INTERFACE- LVDS

//"Vfp" value="16" />
//"Vbp" value="8" />
//"Vsync" value="8" />
//"Hfp" value="120" />
//"Hbp" value="80" />
//"Hsync" value="80" />
//2POWER  IOVCC=3.3V   VCI=3.3/ 
 
 SetGPIO (3,0, 20);   // GPIO3=0  STBYB =0
    //上电时序
    SetOutIOVCC(ON,10);
    SetOutVCI(ON,10);
    SetLcmRst(1,100);    //LCM 复位脚电平控制，1为拉高，100为延时100ms
    //SetOutAVDD(ON,10);

    SetLcmRst(0,100);
    SetLcmRst(1,100);
    Delay(200);//120ms

SetSpiSckIdleSta(0);


SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x01); // ENTER PAGE1  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xea,0x07);       
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xeb,0x12);    
//SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x05,0x14);   
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0a,0x26); // vcom  26
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x17,0x32);  //VDDD
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x28,0x14); //vgh 12V
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x29,0x1B); //vgl -11.5V
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2a,0x62);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2f,0xf3); 
//SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x45,0x80);  // te
 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x02); // ENTER PAGE2          
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x39,0xa0); //VSPNR    5.0
//GAMMA 2.2
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x00);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x01,0x05); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x02,0x0A); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x03,0x08);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x04,0x0E);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x05,0x28);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x06,0x0B);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x07,0x0D);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x08,0x0E);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x09,0x0D); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0A,0x10); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0b,0x45);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0c,0x12);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0d,0x18);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0e,0x27);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0f,0x2C); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x10,0x3F);

SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x20,0x00); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x21,0x05);   
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x22,0x0A);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x23,0x08);   
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x24,0x0E);   
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x25,0x28);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x26,0x0B); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x27,0x0D); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x28,0x0E); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x29,0x0D); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2A,0x10); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2b,0x45);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2c,0x12);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2d,0x18);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2e,0x27);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2f,0x2C); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x30,0x3F);
/*
//GAMMA 2.5
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x00);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x01,0x02); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x02,0x06); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x03,0x07);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x04,0x0d);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x05,0x21);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x06,0x0b);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x07,0x0c);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x08,0x0d);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x09,0x0c); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0A,0x10); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0b,0x42);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0c,0x13);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0d,0x18);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0e,0x2a);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0f,0x2e); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x10,0x3F);

SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x20,0x00); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x21,0x02);   
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x22,0x06);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x23,0x07);   
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x24,0x0d);   
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x25,0x21);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x26,0x0B); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x27,0x0c); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x28,0x0d); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x29,0x0c); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2A,0x10); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2b,0x42);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2c,0x13);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2d,0x18);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2e,0x2a);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2f,0x2e); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x30,0x3F);
*/
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x03);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0b,0x55);

SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x04);    //page4       
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x00); //800  00
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x01,0x00);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x02,0xf0);//480
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x03,0x03);//03
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x04,0x20); //20
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x06,0x06);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x07,0x05);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x08,0x12); //ss-tp
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x09,0x20); //pol 20
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0a,0x09);  // SMGIP
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0b,0x00);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x20,0x40);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2A,0x00); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x40,0x00);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x46,0x10);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x47,0x10);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x48,0x0f);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x49,0x0f);

SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x05);        
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x00);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x01,0x04);   // stva 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x02,0x15);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x03,0x05); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x07,0xC3);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x08,0xC7);    
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x10,0x02);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x11,0x06);  // ckva
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x12,0X45);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x13,0X05);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x19,0xCC);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x1a,0x73); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x23,0x00);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x47,0x00);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x44,0x01);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x45,0x81);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x46,0x01);

SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x06); //PAGE6 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x23);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x01,0x01); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x06,0xCD);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x08,0x67); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x09,0x45);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0A,0x23); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0B,0x01); 

SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x07); //PAGE7    
//GIP LEFT 1-12  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x16);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x01,0x14);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x02,0x3C);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x03,0x0c);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x04,0x0d); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x05,0x10);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x06,0x12);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x07,0x3F);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x08,0x00);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x09,0x02); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0A,0x3C);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0b,0x3C); 
//GIP RIGHT 1-12 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x20,0x17);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x21,0x15);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x22,0x3C);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x23,0x0c);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x24,0x0d);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x25,0x11);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x26,0x13);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x27,0x3F);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x28,0x01);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x29,0x03);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2A,0x3C);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2b,0x3C);

SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x0F);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x01);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x01,0x10);

SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xea,0x00);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xeb,0x00);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x00);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x36,0x00);

SetGPIO (3,1, 20);   // GPIO1=0  // GPIO3  SET STBYB HIGE
Delay(120);

//.......OTP........//
/*
Delay(200);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x28,0x00);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x0a);  // ENTER PAGEa 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xea,0x07);  // WRITE enable       
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xeb,0x12);    

SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x30,0x78);  //reg_otp_prgm_cycle_set[7:0] 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x31,0x82);  // ternal vpp program  en 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x35,0x02);  //reg_otp_vghl_rt[1:0]  7005-03 MUST02
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x36,0x02);  //  votp ???????  8.0V-8.5V reg_otp_vgh_set[5:0]
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x37,0x01);  //otp_vgh_sel=1 ???votp 
Delay(200);//120ms

SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x80);  // program all  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x02,0x10); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x05,0x40);  // dbma1
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x06,0x41);  //reg_prgm_pwrgas1  reg_prgm_pwr_int1
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x07,0x09);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x09,0x40);  //reg_prgm_misc1 
Delay(200);//120ms
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xea,0x78);   // program en 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xeb,0x69);       
Delay(1200);  //240                                    
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x0a);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xea,0x07);  // WRITE enable       
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xeb,0x12);    
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x31,0x02);  // internal vpp program dis 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x37,0x00);   // vgh sel frome pahe1 

SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x00);   // ENTER PAGE0  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xea,0x00);     
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xeb,0x00);   
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x29,0x00);

*/

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