AG1KLP family provides low cost, ultra-low power , SRAM-based FPGAs, with density is ranging from 640 up to1280 Look-Up Tables(LUTs). The devices feature Embedded Block Memory (EBR), Distributed RAM, and Phase Locked Loops (PLLs), while offering small footprint package WLSCP and ucBGA. The devices are designed for ultra low power and cost while providing programmable solutions for a wide range of applications, especially in consumer and mobile device products.
Features
-
Low power and low cost FPGA.
-
Flexible logic architecture based on LUT.
-
Ultra-low power, as low as 50 μA standby typical Icc (1.2V Vcc).
-
Broad range of package options, small footprint package for consumer and mobile application.
-
Provides PLL per device provide clock multiplication and phase shifting
-
3.3-V, 2.5-V, 1.8-V, 1.5-V LVCMOS and LVTTL standards
-
Flexible device configuration through SPI interface
-
Table 1-1 Shows AG1KLP family features
Feature |