advanced 先进的,高级的
aligned mode 对齐模式
aligned 对齐的
abstraction 抽象
backward 向后的 forward 向前的
behavior 行为,态度
compensate 补偿
compass 指南针,罗盘
chapter 章节,章
common 共同的,常见的
coines 硬币
cursor 光标
calbration 校准
current 当前的
counter 计数器
circuit 电路
dynamic 动态的
dependent 依赖,相关
definetions 定义
direction 方向
division 分割
clock division value 时钟分频
execution 执行
execute 执行
entire 全部的,整个的
export 输出
external 外部的
forced 被迫的(被动)
feature 特征
fixed 固定的()
following 下列的
from cursor 从光标
latch 占有(锁存器)
operation 操作,运算
origin 原点,开端
options 选项
overrun 溢出,泛滥
obtain 获得,得到
polarity 极性
preset 预置
perform 执行
prescalers 预分频器
period 周期
platform 平台
profile 扼要描述
regular 有规律的
representation 表示,表述
repetition 重复
counter repetition value 计数值重复值
still 仍然,静止
specification 规格(规格书)
sample 采样,样品
timing 定时 (时序)
trigger 触发
Triggers 触发器
internal 内部的
invalid 无效的
index 索引
integrate 综合的
integrate circuit 集成电路
measurement 测量
manager 管理
width 宽度
variables 变量
vendor 供应商id
AHB Advanced High-performance Bus (ARM bus standard)
AHB-AP DAP AHB Port for debug component access thru AHB bus
AMBA Advanced Microcontroller Bus Architecture
AON Always-on power domain
APB Advanced Peripheral Bus (ARM bus standard)
APB-AP DAP APB Port for debug component access thru APB bus
BROM Boot ROM
DAP Debug Access Port ( ARM bus standard)
ETM Embedded trace module
FPU Floating Point Unit
I2C Inter-Integrated Circuit
I2S Inter-IC Sound, Integrated Interchip Sound
ITM Instrumentation Trace Macrocell Unit
JTAG Joint Test Access Group (IEEE standard)
JTAG-AP DAP’s JTAG Access Port to access debug components
JTAG-DP DAP’s JTAG Debug Port used by external debugger
J&M Jun and Marty LLC
MPU Memory Protection Unit
NVIC Nested vector Interrupt Controller
PCR Power Clock Reset controller
POR Power on reset, it is active low in this document
RFIF APB peripheral to interface RF block
SWD Serial Wire DAP (ARM bus standard)
SoC System on chip
SPI Serial Peripheral Interface
SRAM Static Random Access memory
TWI Two-Wire Interface
UART Universal Asynchronous Receiver and Transmitter
WDT Watchdog Timer