入门介绍
基本介绍 Overview
The PPC460-S supports a Flat,36-bit(64GB) real(physical) address space.
36位的物理地址通过MMU产生(内核根据取值、取指的32位有效地址翻译而来)
MMU功能
The MMU provides address translation,access protection,and storage attitude control for embedded applications.
MMU提供了如下功能:
- 32位的有效地址(effective address)转译成36位物理地址空间
- 页读、写、执行控制
- Storage attributes for cache policy, byte order, and speculative memory access .
- Software control of page replacement strategy
TLB
Overview
The translation lookaside buffer( 后备转译缓存)是基本的硬件资源
(如同指令和数据Cache,只是用来存储页表,已加快地址翻译以及提供内存保护)。
Attribute
It consists of 64 entries, each specifying the various attributes of a given page of the address space.
The TLB is fully-associative, the entry for a given page can be placed anywhere in the TLB. The TLB Tag and data memory arrays are parity protected against soft errors, which causes a machine check exception.
一般由软件来管理TLB入口的建立和替换,这样给用户在定义页表转换策略提供了灵活性。
例如,你可以定义全局可访问的静态映射的TLB入口,以提高转译的效率。
TLB的相关操作指令是特权级的,因此处理器必须处于内核态来处理。
Address Translation
首先将有效地址翻译为虚拟地址(virtual address)
- 41位虚拟地址来源:32位有效地址, 8位Process ID(PID), 1位Address Space Identifier
- PID值从PID寄存器获取
- AS Identifier从MSR寄存器获取
- 使用TLB将41位虚拟地址翻译成36位物理地址
NOTE:只有对在TLB中含有有效的虚拟地址的页的入口地址才会发生翻译,否则会引