关于树莓派3B+ CPU是BCM2835 还是BCM2837的问题

最近买了树莓派3B+玩,查看cpu信息是发现竟然是 BCM2835,ARMv7 :

$ cat /proc/cpuinfo| grep Hardware
Hardware        : BCM2835
model name      : ARMv7 Processor rev 4 (v7l)

可是X宝和X东明明标着是BCM2837,ARMV8的啊,莫非买到假货了。
百度一顿搜,发现官网有如下解释:

this, as 6by9 indicated, is due to the fact that the upstream ARM kernel only allows us to set a single value for our devices. 
If we wanted to have multiple different values it would require that we edit the code (which in general we prefer not to do 
because is causes problems for us wen integrating changes from upstream).

i've asked Phil to change this to instead return "BCM28xx" to indicate that the kernel is specifically for the BCM2805/6/7 silicon.

if you'd like to find out the model of the computer you should use the device tree instead a la:
pi@raspberrypi:~ $ cat /proc/device-tree/model
Raspberry Pi 3 Model B Rev 1.2

谷歌翻译:
正如6by9所指出的那样,这是因为上游ARM内核只允许我们为设备设置单个值。如果我们想要有多个不同的值,则需要我们编辑代码(通常我们不希望这样做,因为它在从上游集成更改时会给我们带来问题)。

我已经要求Phil改变它而不是返回“BCM28xx”来表示该内核专门用于BCM2805 / 6/7芯片。

如果你想找出计算机的型号,你应该使用设备树而不是la:

我的树莓派输出结果是这样的,好吧,姑且认为这个就是3B+吧:

pi@raspberrypi:~ $ cat /proc/device-tree/model
Raspberry Pi 3 Model B Plus Rev 1.3

原文地址:
https://www.raspberrypi.org/forums/viewtopic.php?p=1190349

Table of Contents 1 Introduction 4 1.1 Overview 4 1.2 Address map 4 1.2.1 Diagrammatic overview 4 1.2.2 ARM virtual addresses (standard Linux kernel only) 6 1.2.3 ARM physical addresses 6 1.2.4 Bus addresses 6 1.3 Peripheral access precautions for correct memory ordering 7 2 Auxiliaries: UART1 & SPI1, SPI2 8 2.1 Overview 8 2.1.1 AUX registers 9 2.2 Mini UART 10 2.2.1 Mini UART implementation details. 11 2.2.2 Mini UART register details. 11 2.3 Universal SPI Master (2x) 20 2.3.1 SPI implementation details 20 2.3.2 Interrupts 21 2.3.3 Long bit streams 21 2.3.4 SPI register details. 22 3 BSC 28 3.1 Introduction 28 3.2 Register View 28 3.3 10 Bit Addressing 36 4 DMA Controller 38 4.1 Overview 38 4.2 DMA Controller Registers 39 4.2.1 DMA Channel Register Address Map 40 4.3 AXI Bursts 63 4.4 Error Handling 63 4.5 DMA LITE Engines 63 5 External Mass Media Controller 65 o Introduction 65 o Registers 66 6 General Purpose I/O (GPIO) 89 6.1 Register View 90 6.2 Alternative Function Assignments 102 6.3 General Purpose GPIO Clocks 105 7 Interrupts 109 7.1 Introduction 109 7.2 Interrupt pending. 110 7.3 Fast Interrupt (FIQ). 110 7.4 Interrupt priority. 110 7.5 Registers 112 8 PCM / I2S Audio 119 8.1 Block Diagram 120 8.2 Typical Timing 120 8.3 Operation 121 8.4 Software Operation 122 8.4.1 Operating in Polled mode 122 8.4.2 Operating in Interrupt mode 123 8.4.3 DMA 123 8.5 Error Handling. 123 8.6 PDM Input Mode Operation 124 8.7 GRAY Code Input Mode Operation 124 8.8 PCM Register Map 125 9 Pulse Width Modulator 138 9.1 Overview 138 9.2 Block Diagram 138 9.3 PWM Implementation 139 9.4 Modes of Operation 139 9.5 Quick Reference 140 9.6 Control and Status Registers 141 10 SPI 148 10.1 Introduction 148 10.2 SPI Master Mode 148 10.2.1 Standard mode 148 10.2.2 Bidirectional mode 149 10.3 LoSSI mode 150 10.3.1 Command write 150 10.3.2 Parameter write 150 10.3.3 Byte read commands 151 10.3.4 24bit read command 151 10.3.5 32bit read command 151 10.4 Block Diagram 152 10.5 SPI Register Map 152 10.6 Software Operation 158 10.6.1 Polled 158 10.6.2 Interrupt 158 10.6.3 DMA 158 10.6.4 Notes 159 11 SPI/BSC SLAVE 160 11.1 Introduction 160 11.2 Registers 160 12 System Timer 172 12.1 System Timer Registers 172 13 UART 175 13.1 Variations from the 16C650 UART 175 13.2 Primary UART Inputs and Outputs 176 13.3 UART Interrupts 176 13.4 Register View 177 14 Timer (ARM side) 196 14.1 Introduction 196 14.2 Timer Registers: 196 15 USB 200 15.1 Configuration 200 15.2 Extra / Adapted registers. 202
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