PCB concept

本文介绍了印刷电路板(PCB),它是固定电子元件的薄板,元件可通过通孔或表面安装。简单的PCB一面是元件和电线,另一面是互连电路,还可双面安装、有多层结构。连接采用金属条,常通过光刻胶和酸蚀刻制作。电脑等电子系统可能由多个PCB组成。

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printed circuit board

<hardware> (PCB) A thin board to which electronic components are fixed by solder. Component leads and integrated circuit pins may pass through holes ("vias") in the board or they may be surface mounted, in which case no holes are required (though they may still be used to connect different layers).

The simplest kind of PCB has components and wires on one side and interconnections (the printed circuit) on the other. PCBs may have components mounted on both sides and may have many internal layers, allowing more connections to fit in the same board area. Boards with internal conductor layers usually have "plated-through holes" to improve the electrical connection to the internal layers.

The connections are metal strips (usually copper). The pattern of connections is often produced using photo-resist and acid etching. Boards, especially those for high frequency circuits such as modern microprocessors, usually have one or more "ground planes" and "power planes" which are large areas of copper for greater current carrying ability.

A computer or other electronic system might be built from several PCBs, e.g. processor, memory, graphics controller, disk controller etc. These boards might all plug into a motherboard or backplane or be connected by a ribbon cable.

(1995-05-01)

资源下载链接为: https://pan.quark.cn/s/00cceecb854d 这个项目名为“mnist-nnet-hls-zynq7020-fpga prj”,是一个与机器学习相关的工程,专注于利用高级综合(HLS)技术将针对MNIST数据集设计的神经网络(nnet)实现在Zynq 7020 FPGA平台上,以加速图像识别任务。项目提供的压缩包包含所有相关代码文件,如C/C++源码、HLS接口定义、Vivado HLS项目文件、硬件描述语言代码(Verilog或VHDL)及配置文件等,用户可通过这些代码理解、实现或修改设计流程。 项目标签“mnist-nnet-hls-z”进一步明确了其关注点:MNIST数据集、HLS技术以及Zynq目标平台。MNIST是用于手写数字识别的知名训练数据集;HLS可将高级编程语言转化为硬件描述语言;Zynq 7020是Xilinx的SoC FPGA,融合了ARM处理器与可编程逻辑。文件名中提到的“vivado”指的是Xilinx的Vivado设计套件,它是一个用于FPGA设计、实现、仿真和调试的集成开发环境,其中的Vivado HLS工具能够将C、C++或SystemC编写的算法自动转换为硬件描述语言代码。 项目可能的实施步骤如下:首先,对MNIST数据集进行预处理,如归一化、降维等,使其适配神经网络模型输入;其次,构建适用于手写数字识别的神经网络模型,例如卷积神经网络(CNN)或全连接网络(FCN);接着,运用HLS工具将神经网络模型转化为硬件描述,并优化性能与资源利用率;然后,在Vivado环境中,将生成的硬件描述代码映射到Zynq 7020的FPGA部分,进行时序分析与综合优化;此外,由于Zynq是SoC,包含处理器系统,还需编写控制软件来管理与调度FPGA上的硬件加速器,可能涉及OpenCV、OpenCL等库的使用;之后,
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