http://www.hwdio.com/

这是一个关于产品领域的网站,提供最新产品资讯与发展方向,帮助用户了解行业动态,掌握市场趋势。

http://www.hwdio.com/

一个不错的网站,可以看到一些产品的资讯以及一些产品的方向

脚本1: /* * dts file for Hisilicon tiangong0 Development Board * * Copyright (C) 2022-09-07, Hisilicon Ltd. * */ /dts-v1/; /plugin/; #include <dt-bindings/gpio/gpio.h> / { compatible = "hsan,tiangong0"; board_id = <0>; vendor_id = "hsan"; fragment@0 { target-path = "/"; __overlay__ { board_id = <0>; vendor_id = "hsan"; }; }; fragment@1 { target = <&pmupwm>; __overlay__ { pinctrl-0 = <&pmupwm_sig1_state>; }; }; fragment@2 { target = <&peri_gpio0>; __overlay__ { pinctrl-names = "default"; pinctrl-0 = <&gpio7_default_state>, <&gpio12_default_state>, <&gpio13_default_state>, <&gpio27_default_state>, <&gpio28_default_state>; }; }; fragment@3 { target = <&gemac3>; __overlay__ { phy-mode = "gmii"; sgmii; phy-handle = <&gephy3>; }; }; fragment@4 { target = <&gemac4>; __overlay__ { status = "disabled"; }; }; fragment@5 { target = <&gephy4>; __overlay__ { status = "disabled"; }; }; fragment@8 { target = <&usb3_xhci>; __overlay__ { status = "disabled"; }; }; fragment@9 { target = <&serdes0>; __overlay__ { status = "disabled"; }; }; fragment@10 { target = <&serdes1>; __overlay__ { status = "disabled"; }; }; fragment@11 { target = <&gephy3_2p5>; __overlay__ { status = "disabled"; }; }; fragment@12 { target = <&gephy3>; __overlay__ { status = "okay"; }; }; fragment@13 { target = <&i2c1>; __overlay__ { status = "disabled"; }; }; fragment@14 { target = <&spi0>; __overlay__ { pinctrl-names = "default"; pinctrl-0 = <&gpio34_default_state>; slicdev { compatible = "hsan,slic-spidev"; reg = <0>; spi-max-frequency = <4096000>; zsi; rst-gpios = <&portb 2 GPIO_ACTIVE_HIGH>; /* gpio34 */ gpio-delay = <50>; spi-cpha; spi-cpol; spi-cs-high; }; }; }; fragment@15 { target = <&hwdio>; __overlay__ { pinctrl-names = "default"; pinctrl-0 = <&hw0_default_state>; interface-mode = <1>; /* 0:hw; 1:zsi; 2:isi */ clk-sel = <0>; /* 0:osc; 1:serdes0; 2:serdes1; 3:serdes2 */ clk-mode = <1>; /* 0:input clk; 1:output clk */ clk-rate = <0>; /* 0:8MHz; 1:4MHz; 2:1MHz; 4:512KHz */ rx-edge = <1>; /* 0:up edge; 1:down edge */ tx-edge = <0>; /* 0:up edge; 1:down edge */ rx-align = <0>; /* value[0,1023] */ tx-align = <0>; /* value[0,1023] */ fs-edge = <0>; /* 0:up edge; 1:down edge */ fs-level = <1>; /* 0:low level; 1:hight level */ fs-rate = <1>; /* sample rate 0:8KHz; 1:16KHz */ fs-mode = <1>; /* 0:normal mode; 1:8KHz mode */ pcm-wide = <1>; /* 0:8bit; 1:16bit */ }; }; fragment@16 { target = <&mii_misc_ge3_2p5>; __overlay__ { status = "disabled"; }; }; fragment@17 { target = <&pinctrl_peri>; __overlay__ { pinctrl-0 = <&peri_power_source0_3v3_state>, <&peri_power_source1_3v3_state>, <&peri_power_source2_3v3_state>; pinctrl-names = "default"; }; }; fragment@18 { target = <&gephy0>; __overlay__ { /* led-polar * 00:on-drive LED low, off-drive LED high * 01:on-drive LED high, off-drive LED low * 10:on-drive LED low, off-tristate LED high * 11:on-drive LED high, off-tristate LED high */ /* led-freq * eg:led-freq = <200>;Blink period is 200ms */ led-polar = <0x0>; led-mode = <0x1>; /* single_led 1, double_led 2 */ pinctrl-names = "default"; pinctrl-0 = <&gephy_led0_default_state>; }; }; fragment@19 { target = <&gephy1>; __overlay__ { led-mode = <1>; led-polar = <0>; pinctrl-names = "default"; pinctrl-0 = <&gephy_led1_default_state>; }; }; fragment@20 { target = <&gephy2>; __overlay__ { led-mode = <1>; led-polar = <0>; pinctrl-names = "default"; pinctrl-0 = <&gephy_led2_default_state>; }; }; fragment@21 { target = <&gephy3>; __overlay__ { led-mode = <1>; led-polar = <0>; pinctrl-names = "default"; pinctrl-0 = <&gephy_led3_default_state>; }; }; }; 脚本2: /* * dts file for Hisilicon tiangong0 Development Board * * Copyright (C) 2022-09-07, Hisilicon Ltd. * */ /dts-v1/; /plugin/; #include <dt-bindings/gpio/gpio.h> / { compatible = "hsan,tiangong0"; board_id = <0>; vendor_id = "vendor3"; fragment@0 { target-path = "/"; __overlay__ { board_id = <0>; vendor_id = "vendor3"; }; }; fragment@1 { target = <&upsphy0>; __overlay__ { status = "okay"; }; }; fragment@2 { target = <&usb3ctrl>; __overlay__ { phys = <&usb2phy0>, <&upsphy0>; phy-names = "usb2phy", "upsphy"; }; }; fragment@3 { target = <&usb3_xhci>; __overlay__ { status = "okay"; }; }; fragment@4 { target = <&peri_gpio0>; __overlay__ { pinctrl-names = "default"; pinctrl-0 = <&gpio1_default_state>, <&gpio27_default_state>, <&gpio28_default_state>, <&gpio29_default_state>, <&gpio38_default_state>, <&gpio39_default_state>, <&gpio40_default_state>, <&gpio41_default_state>; }; }; fragment@5 { target = <&i2c1>; __overlay__ { status = "disabled"; }; }; fragment@6 { target = <&pinctrl_peri>; __overlay__ { pinctrl-0 = <&peri_power_source0_3v3_state>, <&peri_power_source1_3v3_state>, <&peri_power_source2_3v3_state>; pinctrl-names = "default"; }; }; fragment@7 { target = <&pmupwm>; __overlay__ { pinctrl-0 = <&pmupwm_sig1_state>; }; }; fragment@8 { target = <&spi0>; __overlay__ { pinctrl-names = "default"; pinctrl-0 = <&gpio34_default_state>; slicdev { compatible = "hsan,slic-spidev"; reg = <0>; spi-max-frequency = <4096000>; zsi; rst-gpios = <&portb 2 GPIO_ACTIVE_HIGH>; /* gpio34 */ gpio-delay = <50>; spi-cpha; spi-cpol; spi-cs-high; }; }; }; fragment@9 { target = <&hwdio>; __overlay__ { pinctrl-names = "default"; pinctrl-0 = <&hw0_default_state>; interface-mode = <1>; /* 0:hw; 1:zsi; 2:isi */ clk-sel = <0>; /* 0:osc; 1:serdes0; 2:serdes1; 3:serdes2 */ clk-mode = <1>; /* 0:input clk; 1:output clk */ clk-rate = <0>; /* 0:8MHz; 1:4MHz; 2:1MHz; 4:512KHz */ rx-edge = <1>; /* 0:up edge; 1:down edge */ tx-edge = <0>; /* 0:up edge; 1:down edge */ rx-align = <0>; /* value[0,1023] */ tx-align = <0>; /* value[0,1023] */ fs-edge = <0>; /* 0:up edge; 1:down edge */ fs-level = <1>; /* 0:low level; 1:hight level */ fs-rate = <1>; /* sample rate 0:8KHz; 1:16KHz */ fs-mode = <1>; /* 0:normal mode; 1:8KHz mode */ pcm-wide = <1>; /* 0:8bit; 1:16bit */ }; }; fragment@10 { target = <&gemac4>; __overlay__ { status = "disabled"; }; }; fragment@11 { target = <&gephy4>; __overlay__ { status = "disabled"; }; }; fragment@12 { target = <&gemac8>; __overlay__ { status = "disabled"; }; }; fragment@13 { target = <&gephy5>; __overlay__ { status = "disabled"; }; }; fragment@14 { target = <&gemac3>; __overlay__ { phy-mode = "gmii"; phy-handle = <&gephy3>; }; }; fragment@15 { target = <&gephy3_2p5>; __overlay__ { reg = <0x1>; status = "disabled"; reset-gpios = <&porta 29 1>; }; }; fragment@16 { target = <&mdio1>; __overlay__ { pinctrl-names = "default"; pinctrl-0 = <&extphy1_default_state>; }; }; fragment@17 { target = <&gephy0>; __overlay__ { /* led-polar * 00:on-drive LED low, off-drive LED high * 01:on-drive LED high, off-drive LED low * 10:on-drive LED low, off-tristate LED high * 11:on-drive LED high, off-tristate LED high */ /* led-freq * eg:led-freq = <200>;Blink period is 200ms */ led-polar = <0x0>; led-mode = <0x1>; /* single_led 1, double_led 2 */ pinctrl-names = "default"; pinctrl-0 = <&gephy_led0_default_state>; }; }; fragment@18 { target = <&gephy1>; __overlay__ { led-mode = <1>; led-polar = <0>; pinctrl-names = "default"; pinctrl-0 = <&gephy_led1_default_state>; }; }; fragment@19 { target = <&gephy2>; __overlay__ { led-mode = <1>; led-polar = <0>; pinctrl-names = "default"; pinctrl-0 = <&gephy_led2_default_state>; }; }; fragment@20 { target = <&gephy3>; __overlay__ { led-mode = <1>; led-polar = <0>; pinctrl-names = "default"; pinctrl-0 = <&gephy_led3_default_state>; status = "okay"; }; }; fragment@21 { target = <&mii_misc_ge3_2p5>; __overlay__ { status = "disabled"; }; }; }; 这来脚本你的异同
09-05
#=============================================================================== # @brief cmake product info # Copyright (c) CompanyNameMagicTag 2022-2022. All rights reserved. #=============================================================================== set(CONFIG_CHIP_NAME "tiangong0") set(CONFIG_CHIP_VERSION "asic") set(CONFIG_PRODUCT_NAME "cmcc_hgu") set(CONFIG_PRODUCT_VERSION "HiSmartHub_1.2.T05.linux0") set(CONFIG_LINX_XGE_VER_TYPE debug) set(CONFIG_FLASH_TYPE "nand") set(CONFIG_FLASH_PAGE_SIZE 2048) set(CONFIG_FLASH_BLOCK_SIZE 131072) set(CONFIG_FLASH_PARTS_NAME cmcc_hgu) set(CONFIG_FLASH_LOGIC_BLOCK_SIZE 124KiB) set(CONFIG_BASIC_VOL_SIZE 38MiB) set(CONFIG_BASIC_JOURNAL_SIZE 2MiB) set(CONFIG_OVERLAY_VOL_SIZE 4MiB) set(CONFIG_OVERLAY_JOURNAL_SIZE 1MiB) set(CONFIG_UBOOT_SIZE_MAX 1048576) set(CONFIG_PLAT_KERNEL_ARCH CONFIG_PLAT_KERNEL_ARM) set(CONFIG_UBOOT_ARCH_TYPE "arm") set(CONFIG_LINUX_KERNEL_TYPE "arm") set(CONFIG_LINUX_APP_TYPE "arm") set(CONFIG_GREENBOX_ARCH_TYPE arm64) set(CONFIG_LINUX_TEXT_OFFSET "0x80208000") # uart start addr set(CONFIG_ESBC_UART_LINK_ADDR 0x15808020) # flash start addr set(CONFIG_ESBC_FLASH_LINK_ADDR 0x15809100) set(CONFIG_GREENBOX_LINK_ADDR 0x15809100) set(CONFIG_OVERLAY_BOARD_TYPE evb_hsan_16 evb_hsan_17 evb_hsan_18 evb_hsan_20 evb_hsan_21 evb_hsan_22 evb_hsan_23 evb_hsan_24 evb_hsan_25 evb_hsan_26 gpon_hsan_0 gpon_hsan_1 xgpon_hsan_12 xgpon_hsan_13 vendor5_xgpon5 vendor2_xgpon16 vendor3_xgpon0 vendor3_xgpon1 ) set(CONFIG_BOOT_UNSECBOOT ON) set(CONFIG_BUILD_IMAGE_HEAD ON) set(CONFIG_LINUX_DEFCONFIG hsan_cmcc_unify_defconfig) set(CONFIG_IP_VERSION_PRERT "v260") set(CONFIG_IP_VERSION_TRNG "3.0") set(CONFIG_IP_VERSION_SEC "spacc") set(CONFIG_IP_VERSION_KMS "km") set(CONFIG_IP_VERSION_CLK "2.0") set(CONFIG_IP_VERSION_CLK_TEST "1.0") set(CONFIG_IP_VERSION_HWDIO "2.0") set(CONFIG_IP_VERSION_CRYP "2.0") set(CONFIG_IP_VERSION_EFUSE "2.0") set(CONFIG_IP_VERSION_LSW_DP_SRC "v300") set(CONFIG_IP_VERSION_LSW_DP_INC "v300") set(CONFIG_IP_VERSION_LSW_PFE "v300") set(CONFIG_IP_VERSION_PCIE "v2") set(CONFIG_IP_VERSION_PINCTRL "2.0") set(CONFIG_IP_VERSION_NET_PON_GLB "v300") set(CONFIG_IP_VERSION_NET_PON_MAC "v300") set(CONFIG_TOOLCHAIN_ESBC "toolchain-aarch64-mix410-linux") set(CONFIG_TOOLCHAIN_UBOOT "toolchain-aarch64-mix410-linux") set(CONFIG_TOOLCHAIN_LINUX_DRV "toolchain-arm-mix510-linux") set(CONFIG_TOOLCHAIN_LINUX_APP "toolchain-arm-mix510-linux") set(CONFIG_TOOLCHAIN_ATF "toolchain-aarch64-mix410-linux") set(CONFIG_TOOLCHAIN_TEE_DRV "toolchain-arm-mix510-linux") set(CONFIG_TOOLCHAIN_TEE_SRV "toolchain-arm-mix510-linux") set(CONFIG_TOOLCHAIN_MVN "toolchain-apache-maven") set(CONFIG_TOOLCHAIN_LINX_XGE toolchain-cc_riscv32_musl) set(CONFIG_TOOLCHAIN_GREENBOX toolchain-aarch64-mix410-linux) set(CONFIG_TOOLCHIAN_SEL_HCC_ARM64LE ON) set(CONFIG_TOOLCHIAN_SEL_ARM_MIX510_LINUX ON) set(CONFIG_TOOLCHIAN_SEL_ARM_CC_RISCV32_MUSl OFF) set(CONFIG_TOOLCHIAN_SEL_ARM_XTENSA OFF) set(CONFIG_TOOLCHIAN_SEL_APACHE_MAVEN ON) set(CONFIG_TOOLCHIAN_SEL_ARM_AARCH64_MIX410_LINUX ON) 已知ubootb的偏移为0x140000,这里有体现吗?
08-07
#=============================================================================== # @brief cmake product info # Copyright (c) CompanyNameMagicTag 2022-2022. All rights reserved. #=============================================================================== set(CONFIG_CHIP_NAME "tiangong1") set(CONFIG_CHIP_VERSION "asic") set(CONFIG_PRODUCT_NAME "wrt_hgu") set(CONFIG_PRODUCT_VERSION "ChenTang_1.3.T01.linux0") set(CONFIG_LINX_XGE_VER_TYPE debug) set(CONFIG_FLASH_TYPE "spi") set(CONFIG_FLASH_PAGE_SIZE 2048) set(CONFIG_FLASH_BLOCK_SIZE 131072) set(CONFIG_FLASH_PARTS_NAME wrt_hgu) set(CONFIG_FLASH_LOGIC_BLOCK_SIZE 124KiB) set(CONFIG_BASIC_VOL_SIZE 38MiB) set(CONFIG_BASIC_JOURNAL_SIZE 2MiB) set(CONFIG_OVERLAY_VOL_SIZE 4MiB) set(CONFIG_OVERLAY_JOURNAL_SIZE 1MiB) set(CONFIG_UBOOT_SIZE_MAX 1048576) set(CONFIG_PLAT_KERNEL_ARCH CONFIG_PLAT_KERNEL_ARM) set(CONFIG_UBOOT_ARCH_TYPE "arm") set(CONFIG_LINUX_KERNEL_TYPE "arm") set(CONFIG_LINUX_APP_TYPE "arm") set(CONFIG_GREENBOX_ARCH_TYPE arm) set(CONFIG_LINUX_TEXT_OFFSET "0x80208000") set(CONFIG_ESBC_LINK_ADDR 0x17501100) set(CONFIG_GREENBOX_LINK_ADDR 0x17501100) set(CONFIG_ESBC_BOARDID_SOURCE hi_board_id.c) set(CONFIG_OVERLAY_BOARD_TYPE evb_hsan_17_wrt tg1c0d3_cmcc_hgu_wrt tg1c0d8_hgu_wrt tg1c0d9_hgu_wrt ) set(CONFIG_BOOT_UNSECBOOT ON) set(CONFIG_IMAGE_HASH_CHECK OFF) set(CONFIG_BUILD_IMAGE_HEAD ON) set(CONFIG_LINUX_DEFCONFIG hsan_ctc_unify_defconfig) set(CONFIG_IP_VERSION_PRERT "v260") set(CONFIG_IP_VERSION_TRNG "2.0") set(CONFIG_IP_VERSION_CLK "2.0") set(CONFIG_IP_VERSION_HWDIO "2.0") set(CONFIG_IP_VERSION_CRYP "2.0") set(CONFIG_IP_VERSION_LED_PWM "2.0") set(CONFIG_IP_VERSION_EFUSE "2.0") set(CONFIG_IP_VERSION_LSW_DP_SRC "v300") set(CONFIG_IP_VERSION_LSW_DP_INC "v310") set(CONFIG_IP_VERSION_LSW_PFE "v310") set(CONFIG_IP_VERSION_PCIE "v2") set(CONFIG_IP_VERSION_PINCTRL "2.0") set(CONFIG_IP_VERSION_NET_PON_GLB "v300") set(CONFIG_IP_VERSION_NET_PON_MAC "v300") set(CONFIG_TOOLCHAIN_ESBC toolchain-arm-mix510-linux) set(CONFIG_TOOLCHAIN_UBOOT toolchain-arm-mix510-linux) set(CONFIG_TOOLCHAIN_LINUX_DRV "toolchain-arm-mix510-linux") set(CONFIG_TOOLCHAIN_LINUX_APP "toolchain-arm-mix510-linux") set(CONFIG_TOOLCHAIN_MVN "toolchain-apache-maven") # set(CONFIG_TOOLCHAIN_ATF "toolchain-aarch64-mix410-linux") set(CONFIG_TOOLCHAIN_TEE_DRV "toolchain-arm-mix510-linux") set(CONFIG_TOOLCHAIN_TEE_SRV "toolchain-arm-mix510-linux") set(CONFIG_TOOLCHAIN_GREENBOX toolchain-arm-mix510-linux) # set(CONFIG_TOOLCHIAN_SEL_HCC_ARM64LE ON) set(CONFIG_TOOLCHIAN_SEL_ARM_MIX510_LINUX ON) set(CONFIG_TOOLCHIAN_SEL_ARM_CC_RISCV32_MUSl OFF) set(CONFIG_TOOLCHIAN_SEL_ARM_XTENSA OFF) set(CONFIG_TOOLCHIAN_SEL_APACHE_MAVEN OFF) set(CONFIG_TOOLCHIAN_SEL_ARM_AARCH64_MIX410_LINUX ON) 以上,set(CONFIG_OVERLAY_BOARD_TYPE evb_hsan_17_wrt tg1c0d3_cmcc_hgu_wrt tg1c0d8_hgu_wrt tg1c0d9_hgu_wrt ) 是什么意思?
09-13
内容概要:本文档为集成系统平台通用验收方案的经典模板,系统阐述了项目验收的全过程,涵盖验收前提、标准、初步验收、上线试运行及最终验收等关键环节。重点包括验收准备、文档整理、售后服务交接、技术文档移交、上线切换与运行维护、问题处理机制以及项目总结与验收评审等内容,确保系统在功能、性能、稳定性等方面满足合同和技术要求,并实现平稳过渡与长期稳定运行。文档强调交付物完整性、多方协作及后续支持机制,保障项目顺利收尾并进入质保期。; 适合人群:从事系统集成、软件实施、项目管理及相关技术支持工作的专业人员,尤其是参与政府或企业信息化建设项目的技术负责人、项目经理、运维人员及验收评审人员。; 使用场景及目标:①用于指导大型信息系统建设项目在部署后的验收流程设计与执行;②帮助项目团队规范交付文档、理清验收步骤、落实售后服务衔接;③支撑甲乙双方依据合同和标准完成上线试运行、初步验收和最终验收,确保项目合规闭环。; 阅读建议:此模板具有较强的实务性和可操作性,使用者应结合具体项目背景进行裁剪和补充,重点关注验收标准、文档清单和服务交接机制,在实际应用中同步完善问题台账、运维手册和培训记录,提升项目交付质量与客户满意度。
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