背景
Mellanox网卡早期版本以及Engineer simple的DPU支持导出配置文件,该配置文件就是用来告诉firmware的行为。但不是mlxconfig真正设置的文件(mlxconfig -d xxx -e -q应该就是把这个文件读取出来,并且有3个文件,包括默认的,当前的,下次启动的) 。而是生成fw镜像文件使用的配置。理解这个配置文件的作用是能够更底层的辅助理解高性能网卡底底层实现架构
命令
flint -d 06:00.0 dc
说明:
效果:
实战数据
可以看到分了很多域段,根据格式看是使用INI配置文件格式,并且看里面的 iniprep tool
,应该是一个ini prepare的工具,打印包括了[]区分的节[SectionName]
,键值对key=value
,以及注释; This is a commen
以及另外一种注释方式# This is also a comment
节包括了8个节:
可以看到包括了:
- psid的数据:
psid = MT_0000000809
,关于PSID是什么参考兄弟篇:https://blog.youkuaiyun.com/essencelite/article/details/138429032 - name:就是型号
MBF2M345A-VENOT_ES_Ax
- 以及psid的描述:
NVIDIA BlueField-2 E-Series Eng. sample DPU; 200GbE single-port QSFP56; PCIe Gen4 x16; Secure Boot Disabled; Crypto Enabled; 16GB on-board DDR; 1GbE OOB management
(这就是flint和mlxfw工具读取的数据
其他详细看举例:
fw_boot_config 节
- 比如nv_config.global.pci.settings.num_pfs = 0x1, pf的数量
- nv_config.global.emulation_nvme_conf.nvme_emu_enable是否开启nvme的emu
hw_boot_config 节
- 比如 pcie_cfg.pcie_max_speed_supported = 0xf最大速度
[root@one rshim1]# flint -d 06:00.0 dc
;; Generated automatically by iniprep tool on Sun Feb 04 12:18:03 IST 2024 from ./Bluefield-2_MBF2M345A_1p_200g_eth_crypto_ES.prs;; FW version: 24.40.1000
;; Mellanox Technologies LTD
;;[PS_INFO]
;;Name = MBF2M345A-VENOT_ES_Ax
;;Description = NVIDIA BlueField-2 E-Series Eng. sample DPU; 200GbE single-port QSFP56; PCIe Gen4 x16; Secure Boot Disabled; Crypto Enabled; 16GB on-board DDR; 1GbE OOB management
[image_info]
;;;;; This section contains info which is shared by FW and burning tool
psid = MT_0000000809
name = MBF2M345A-VENOT_ES_Ax
description = NVIDIA BlueField-2 E-Series Eng. sample DPU; 200GbE single-port QSFP56; PCIe Gen4 x16; Secure Boot Disabled; Crypto Enabled; 16GB on-board DDR; 1GbE OOB management
prs_name = Bluefield-2_MBF2M345A_1p_200g_eth_crypto_ES.prs
[mfg_info]
guids.guids.num_allocated = 8
guids.macs.num_allocated = 8
[device_info]
guids.guids.num_allocated = 8
guids.macs.num_allocated = 8
[boot_record]
;;;;; 1. Boot record endianes: reserved1 is the fist Byte that should be written on the NVRAM (address 0);2. Each line is protected by parity bit (bit 31) the xor of the 32 read bits should be 1
arm.opn = MBF2M345A-VENOT_ES
arm.tile_cluster_disable = 0x00
[fw_boot_config]
;;;;; boot + iron fw config data
pcie_cfg_data.pci_cfg_space.cfg_hdr.device_id = 41686
pcie_cfg_data.p