GPIOA高8位输入控制低8位输出(位绑定 #define)

本文介绍了一个STM32微控制器中GPIO端口的基本操作示例,通过直接内存映射的方式实现输入输出功能。代码展示了如何配置GPIO并读取输入状态来控制输出状态。
#include "public.h"

#define GPIOA_ODR_ADDR (GPIOA_BASE+0x0c)
#define GPIOA_IDR_ADDR (GPIOA_BASE+0x08)

//#define BitBand(Addr,BitNum) ((Addr&F0000000)+0x2000000 + ((Addr&0xfffff)*32) + (BitNum*4))
#define BitBand(Addr,BitNum) *((unsigned long *)((Addr&0xf0000000)+0x2000000 + ((Addr&0xfffff)<<5) + (BitNum<<2)))

#define PAOut(n)    BitBand(GPIOA_ODR_ADDR,n)
#define PAIn(n)     BitBand(GPIOA_IDR_ADDR,n)

int main()
{
    int i;
    GPIOA->CRH = 0x44444444;
    GPIOA->CRL = 0x33333333;
    while(1)
    {
        for(i=0; i<8; i++)
        {
            if(PAIn(i+8) == 1)
                PAOut(i) = 1;
            else 
                PAOut(i) = 0;
        }
    }
}

#define LCD_SPI_SELECTED SPI1 #define LCD_SPI_SELECTED_CLK CRM_SPI1_PERIPH_CLOCK #define LCD_SPI_SELECTED_IRQn SPI1_IRQn #define LCD_PEN_PIN GPIO_PINS_4 #define LCD_PEN_MASK (1<<4) #define LCD_PEN_PORT GPIOA #define LCD_PEN_GPIO_CLK CRM_GPIOA_PERIPH_CLOCK #define PEN_CHECK gpio_input_data_bit_read(LCD_PEN_PORT,LCD_PEN_PIN) #define LCD_RST_PIN GPIO_PINS_15 #define LCD_RST_MASK (1<<15) #define LCD_RST_PORT GPIOA #define LCD_RST_GPIO_CLK CRM_GPIOA_PERIPH_CLOCK #define LCD_BLK_PIN GPIO_PINS_9 #define LCD_BLK_MASK (1<<9) #define LCD_BLK_PORT GPIOA #define LCD_BLK_GPIO_CLK CRM_GPIOA_PERIPH_CLOCK #define LCD_DC_PIN GPIO_PINS_7 #define LCD_DC_MASK (1<<7) #define LCD_DC_PORT GPIOC #define LCD_DC_GPIO_CLK CRM_GPIOC_PERIPH_CLOCK #define LCD_CS1_PIN GPIO_PINS_0 #define LCD_CS1_MASK (1<<0) #define LCD_CS1_PORT GPIOA #define LCD_CS1_GPIO_CLK CRM_GPIOA_PERIPH_CLOCK #define LCD_CS2_PIN GPIO_PINS_1 #define LCD_CS2_MASK (1<<1) #define LCD_CS2_PORT GPIOA #define LCD_CS2_GPIO_CLK CRM_GPIOA_PERIPH_CLOCK #define LCD_SPI_SCK_PIN GPIO_PINS_5 #define LCD_SPI_SCK_PORT GPIOA #define LCD_SPI_SCK_GPIO_CLK CRM_GPIOA_PERIPH_CLOCK #define LCD_SPI_MOSI_PIN GPIO_PINS_7 #define LCD_SPI_MOSI_PORT GPIOA #define LCD_SPI_MOSI_GPIO_CLK CRM_GPIOA_PERIPH_CLOCK #define LCD_SPI_MISO_PIN GPIO_PINS_6 #define LCD_SPI_MISO_PORT GPIOA #define LCD_SPI_MISO_GPIO_CLK CRM_GPIOA_PERIPH_CLOCK #define LCD_DC_SET LCD_DC_PORT->scr = LCD_DC_MASK #define LCD_RST_SET LCD_RST_PORT->scr = LCD_RST_MASK #define LCD_BLK_SET LCD_BLK_PORT->scr = LCD_BLK_MASK #define LCD_CS1_SET LCD_CS1_PORT->scr = LCD_CS1_MASK #define LCD_CS2_SET LCD_CS2_PORT->scr = LCD_CS2_MASK #define LCD_DC_CLR LCD_DC_PORT->clr = LCD_DC_MASK #define LCD_RST_CLR LCD_RST_PORT->clr = LCD_RST_MASK #define LCD_BLK_CLR LCD_BLK_PORT->clr = LCD_BLK_MASK #define LCD_CS1_CLR LCD_CS1_PORT->clr = LCD_CS1_MASK #define LCD_CS2_CLR LCD_CS2_PORT->clr = LCD_CS2_MASK #define LCD_SPI_MASTER_DMA DMA1 #define LCD_SPI_MASTER_DMA_CLK CRM_DMA1_PERIPH_CLOCK #define LCD_SPI_MASTER_Tx_DMA_IRQn DMA1_Channel3_IRQn #define LCD_SPI_MASTER_Rx_DMA_Channel DMA1_CHANNEL2 #define LCD_SPI_MASTER_Rx_DMA_INT DMA1_FDT2_FLAG #define LCD_SPI_MASTER_Rx_DMA_FLAG DMA1_FDT2_FLAG #define LCD_SPI_MASTER_Tx_DMA_Channel DMA1_CHANNEL3 #define LCD_SPI_MASTER_Tx_DMA_INT DMA1_FDT3_FLAG #define LCD_SPI_MASTER_Tx_DMA_FLAG DMA1_FDT3_FLAG #define LCD_SPI_MASTER_DR_Base (uint32_t)(&(LCD_SPI_SELECTED->dt));
03-18
keil5编写MSP432E401Y开发板代码,使用driverlib库,目前已成功实现硬件SPI+ili9488显示图片显示功能。但是速度慢,可以肉眼观测到扫描屏幕。现在了解到DMA可以实现图片快速显示。原理就是一次传一行,原本是一个一个字节传的,现在使用DMA就可以用数组去存一行然后再发送。已知生成的图片数据是const unsigned char类型的。 以下是ssi.h #define SSI_TXEOT 0x00000040 // Transmit FIFO is empty #define SSI_DMATX 0x00000020 // DMA Transmit complete #define SSI_DMARX 0x00000010 // DMA Receive complete #define SSI_TXFF 0x00000008 // TX FIFO half full or less #define SSI_RXFF 0x00000004 // RX FIFO half full or more #define SSI_RXTO 0x00000002 // RX timeout #define SSI_RXOR 0x00000001 // RX overrun #define SSI_FRF_MOTO_MODE_0 0x00000000 // Moto fmt, polarity 0, phase 0 #define SSI_FRF_MOTO_MODE_1 0x00000002 // Moto fmt, polarity 0, phase 1 #define SSI_FRF_MOTO_MODE_2 0x00000001 // Moto fmt, polarity 1, phase 0 #define SSI_FRF_MOTO_MODE_3 0x00000003 // Moto fmt, polarity 1, phase 1 #define SSI_FRF_TI 0x00000010 // TI frame format #define SSI_MODE_MASTER 0x00000000 // SSI master #define SSI_MODE_SLAVE 0x00000001 // SSI slave #define SSI_DMA_TX 0x00000002 // Enable DMA for transmit #define SSI_DMA_RX 0x00000001 // Enable DMA for receive #define SSI_CLOCK_SYSTEM 0x00000000 #define SSI_CLOCK_ALTCLK 0x00000005 #define SSI_ADV_MODE_LEGACY 0x00000000 #define SSI_ADV_MODE_READ_WRITE 0x000001c0 #define SSI_ADV_MODE_WRITE 0x000000c0 #define SSI_ADV_MODE_BI_READ 0x00000140 #define SSI_ADV_MODE_BI_WRITE 0x00000040 #define SSI_ADV_MODE_QUAD_READ 0x00000180 #define SSI_ADV_MODE_QUAD_WRITE 0x00000080 extern void SSIConfigSetExpClk(uint32_t ui32Base, uint32_t ui32SSIClk, uint32_t ui32Protocol, uint32_t ui32Mode, uint32_t ui32BitRate, uint32_t ui32DataWidth); extern void SSIDataGet(uint32_t ui32Base, uint32_t *pui32Data); extern int32_t SSIDataGetNonBlocking(uint32_t ui32Base, uint32_t *pui32Data); extern void SSIDataPut(uint32_t ui32Base, uint32_t ui32Data); extern int32_t SSIDataPutNonBlocking(uint32_t ui32Base, uint32_t ui32Data); extern void SSIDisable(uint32_t ui32Base); extern void SSIEnable(uint32_t ui32Base); extern void SSIIntClear(uint32_t ui32Base, uint32_t ui32IntFlags); extern void SSIIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags); extern void SSIIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags); extern void SSIIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)); extern uint32_t SSIIntStatus(uint32_t ui32Base, bool bMasked); extern void SSIIntUnregister(uint32_t ui32Base); extern void SSIDMAEnable(uint32_t ui32Base, uint32_t ui32DMAFlags); extern void SSIDMADisable(uint32_t ui32Base, uint32_t ui32DMAFlags); extern bool SSIBusy(uint32_t ui32Base); extern void SSIClockSourceSet(uint32_t ui32Base, uint32_t ui32Source); extern uint32_t SSIClockSourceGet(uint32_t ui32Base); extern void SSIAdvModeSet(uint32_t ui32Base, uint32_t ui32Mode); extern void SSIAdvDataPutFrameEnd(uint32_t ui32Base, uint32_t ui32Data); extern int32_t SSIAdvDataPutFrameEndNonBlocking(uint32_t ui32Base, uint32_t ui32Data); extern void SSIAdvFrameHoldEnable(uint32_t ui32Base); extern void SSIAdvFrameHoldDisable(uint32_t ui32Base); 以下是udma.h typedef struct { // // The ending source address of the data transfer. // volatile void *pvSrcEndAddr; // // The ending destination address of the data transfer. // volatile void *pvDstEndAddr; // // The channel control mode. // volatile uint32_t ui32Control; // // An unused location. // volatile uint32_t ui32Spare; } tDMAControlTable; #define uDMATaskStructEntry(ui32TransferCount, \ ui32ItemSize, \ ui32SrcIncrement, \ pvSrcAddr, \ ui32DstIncrement, \ pvDstAddr, \ ui32ArbSize, \ ui32Mode) \ { \ (((ui32SrcIncrement) == UDMA_SRC_INC_NONE) ? (void *)(pvSrcAddr) : \ ((void *)(&((uint8_t *)(pvSrcAddr))[((ui32TransferCount) << \ ((ui32SrcIncrement) >> 26)) - 1]))), \ (((ui32DstIncrement) == UDMA_DST_INC_NONE) ? (void *)(pvDstAddr) :\ ((void *)(&((uint8_t *)(pvDstAddr))[((ui32TransferCount) << \ ((ui32DstIncrement) >> 30)) - 1]))), \ (ui32SrcIncrement) | (ui32DstIncrement) | (ui32ItemSize) | \ (ui32ArbSize) | \ (((ui32TransferCount) - 1) << 4) | \ ((((ui32Mode) == UDMA_MODE_MEM_SCATTER_GATHER) || \ ((ui32Mode) == UDMA_MODE_PER_SCATTER_GATHER)) ? \ (ui32Mode) | UDMA_MODE_ALT_SELECT : (ui32Mode)), 0 \ } #define UDMA_ATTR_USEBURST 0x00000001 #define UDMA_ATTR_ALTSELECT 0x00000002 #define UDMA_ATTR_HIGH_PRIORITY 0x00000004 #define UDMA_ATTR_REQMASK 0x00000008 #define UDMA_ATTR_ALL 0x0000000 #define UDMA_MODE_STOP 0x00000000 #define UDMA_MODE_BASIC 0x00000001 #define UDMA_MODE_AUTO 0x00000002 #define UDMA_MODE_PINGPONG 0x00000003 #define UDMA_MODE_MEM_SCATTER_GATHER \ 0x00000004 #define UDMA_MODE_PER_SCATTER_GATHER \ 0x00000006 #define UDMA_MODE_ALT_SELECT 0x00000001 #define UDMA_DST_INC_8 0x00000000 #define UDMA_DST_INC_16 0x40000000 #define UDMA_DST_INC_32 0x80000000 #define UDMA_DST_INC_NONE 0xc0000000 #define UDMA_SRC_INC_8 0x00000000 #define UDMA_SRC_INC_16 0x04000000 #define UDMA_SRC_INC_32 0x08000000 #define UDMA_SRC_INC_NONE 0x0c000000 #define UDMA_SIZE_8 0x00000000 #define UDMA_SIZE_16 0x11000000 #define UDMA_SIZE_32 0x22000000 #define UDMA_DST_PROT_PRIV 0x00200000 #define UDMA_SRC_PROT_PRIV 0x00040000 #define UDMA_ARB_1 0x00000000 #define UDMA_ARB_2 0x00004000 #define UDMA_ARB_4 0x00008000 #define UDMA_ARB_8 0x0000c000 #define UDMA_ARB_16 0x00010000 #define UDMA_ARB_32 0x00014000 #define UDMA_ARB_64 0x00018000 #define UDMA_ARB_128 0x0001c000 #define UDMA_ARB_256 0x00020000 #define UDMA_ARB_512 0x00024000 #define UDMA_ARB_1024 0x00028000 #define UDMA_NEXT_USEBURST 0x00000008 #define UDMA_PRI_SELECT 0x00000000 #define UDMA_ALT_SELECT 0x00000020 // Channel 0 // #define UDMA_CH0_RESERVED0 0x00000000 #define UDMA_CH0_UART2RX 0x00010000 #define UDMA_CH0_RESERVED2 0x00020000 #define UDMA_CH0_TIMER4A 0x00030000 #define UDMA_CH0_RESERVED4 0x00040000 #define UDMA_CH0_RESERVED5 0x00050000 #define UDMA_CH0_I2C0RX 0x00060000 #define UDMA_CH0_RESERVED7 0x00070000 #define UDMA_CH0_RESERVED8 0x00080000 // // Channel 1 // #define UDMA_CH1_RESERVED0 0x00000001 #define UDMA_CH1_UART2TX 0x00010001 #define UDMA_CH1_RESERVED2 0x00020001 #define UDMA_CH1_TIMER4B 0x00030001 #define UDMA_CH1_RESERVED4 0x00040001 #define UDMA_CH1_RESERVED5 0x00050001 #define UDMA_CH1_I2C0TX 0x00060001 #define UDMA_CH1_RESERVED7 0x00070001 #define UDMA_CH1_RESERVED8 0x00080001 // // Channel 2 // #define UDMA_CH2_RESERVED0 0x00000002 #define UDMA_CH2_TIMER3A 0x00010002 #define UDMA_CH2_RESERVED2 0x00020002 #define UDMA_CH2_RESERVED3 0x00030002 #define UDMA_CH2_RESERVED4 0x00040002 #define UDMA_CH2_RESERVED5 0x00050002 #define UDMA_CH2_I2C1RX 0x00060002 #define UDMA_CH2_RESERVED7 0x00070002 #define UDMA_CH2_RESERVED8 0x00080002 // // Channel 3 // #define UDMA_CH3_RESERVED0 0x00000003 #define UDMA_CH3_TIMER3B 0x00010003 #define UDMA_CH3_RESERVED2 0x00020003 #define UDMA_CH3_RESERVED3 0x00030003 #define UDMA_CH3_RESERVED4 0x00040003 #define UDMA_CH3_RESERVED5 0x00050003 #define UDMA_CH3_I2C1TX 0x00060003 #define UDMA_CH3_RESERVED7 0x00070003 #define UDMA_CH3_RESERVED8 0x00080003 // // Channel 4 // #define UDMA_CH4_RESERVED0 0x00000004 #define UDMA_CH4_TIMER2A 0x00010004 #define UDMA_CH4_RESERVED2 0x00020004 #define UDMA_CH4_GPIOA 0x00030004 #define UDMA_CH4_RESERVED4 0x00040004 #define UDMA_CH4_SHAMD50CIN 0x00050004 #define UDMA_CH4_I2C2RX 0x00060004 #define UDMA_CH4_RESERVED7 0x00070004 #define UDMA_CH4_RESERVED8 0x00080004 // // Channel 5 // #define UDMA_CH5_RESERVED0 0x00000005 #define UDMA_CH5_TIMER2B 0x00010005 #define UDMA_CH5_RESERVED2 0x00020005 #define UDMA_CH5_GPIOB 0x00030005 #define UDMA_CH5_RESERVED4 0x00040005 #define UDMA_CH5_SHAMD50DIN 0x00050005 #define UDMA_CH5_I2C2TX 0x00060005 #define UDMA_CH5_RESERVED7 0x00070005 #define UDMA_CH5_RESERVED8 0x00080005 // // Channel 6 // #define UDMA_CH6_RESERVED0 0x00000006 #define UDMA_CH6_TIMER2A 0x00010006 #define UDMA_CH6_UART5RX 0x00020006 #define UDMA_CH6_GPIOC 0x00030006 #define UDMA_CH6_I2C0RX 0x00040006 #define UDMA_CH6_SHAMD50COUT 0x00050006 #define UDMA_CH6_RESERVED6 0x00060006 #define UDMA_CH6_RESERVED7 0x00070006 #define UDMA_CH6_RESERVED8 0x00080006 // // Channel 7 // #define UDMA_CH7_RESERVED0 0x00000007 #define UDMA_CH7_TIMER2B 0x00010007 #define UDMA_CH7_UART5TX 0x00020007 #define UDMA_CH7_GPIOD 0x00030007 #define UDMA_CH7_I2C0TX 0x00040007 #define UDMA_CH7_RESERVED5 0x00050007 #define UDMA_CH7_RESERVED6 0x00060007 #define UDMA_CH7_RESERVED7 0x00070007 #define UDMA_CH7_RESERVED8 0x00080007 // // Channel 8 // #define UDMA_CH8_UART0RX 0x00000008 #define UDMA_CH8_UART1RX 0x00010008 #define UDMA_CH8_RESERVED2 0x00020008 #define UDMA_CH8_TIMER5A 0x00030008 #define UDMA_CH8_I2C1RX 0x00040008 #define UDMA_CH8_RESERVED5 0x00050008 #define UDMA_CH8_RESERVED6 0x00060008 #define UDMA_CH8_RESERVED7 0x00070008 #define UDMA_CH8_RESERVED8 0x00080008 // // Channel 9 // #define UDMA_CH9_UART0TX 0x00000009 #define UDMA_CH9_UART1TX 0x00010009 #define UDMA_CH9_RESERVED2 0x00020009 #define UDMA_CH9_TIMER5B 0x00030009 #define UDMA_CH9_I2C1TX 0x00040009 #define UDMA_CH9_RESERVED5 0x00050009 #define UDMA_CH9_RESERVED6 0x00060009 #define UDMA_CH9_RESERVED7 0x00070009 #define UDMA_CH9_RESERVED8 0x00080009 // // Channel 10 // #define UDMA_CH10_SSI0RX 0x0000000A #define UDMA_CH10_SSI1RX 0x0001000A #define UDMA_CH10_UART6RX 0x0002000A #define UDMA_CH10_RESERVED3 0x0003000A #define UDMA_CH10_I2C2RX 0x0004000A #define UDMA_CH10_RESERVED5 0x0005000A #define UDMA_CH10_RESERVED6 0x0006000A #define UDMA_CH10_TIMER6A 0x0007000A #define UDMA_CH10_RESERVED8 0x0008000A // // Channel 11 // #define UDMA_CH11_SSI0TX 0x0000000B #define UDMA_CH11_SSI1TX 0x0001000B #define UDMA_CH11_UART6TX 0x0002000B #define UDMA_CH11_RESERVED3 0x0003000B #define UDMA_CH11_I2C2TX 0x0004000B #define UDMA_CH11_RESERVED5 0x0005000B #define UDMA_CH11_RESERVED6 0x0006000B #define UDMA_CH11_TIMER6B 0x0007000B #define UDMA_CH11_RESERVED8 0x0008000B // // Channel 12 // #define UDMA_CH12_RESERVED0 0x0000000C #define UDMA_CH12_UART2RX 0x0001000C #define UDMA_CH12_SSI2RX 0x0002000C #define UDMA_CH12_RESERVED3 0x0003000C #define UDMA_CH12_GPIOK 0x0004000C #define UDMA_CH12_AES0CIN 0x0005000C #define UDMA_CH12_RESERVED6 0x0006000C #define UDMA_CH12_TIMER7A 0x0007000C #define UDMA_CH12_RESERVED8 0x0008000C // // Channel 13 // #define UDMA_CH13_RESERVED0 0x0000000D #define UDMA_CH13_UART2TX 0x0001000D #define UDMA_CH13_SSI2TX 0x0002000D #define UDMA_CH13_RESERVED3 0x0003000D #define UDMA_CH13_GPIOL 0x0004000D #define UDMA_CH13_AES0COUT 0x0005000D #define UDMA_CH13_RESERVED6 0x0006000D #define UDMA_CH13_TIMER7B 0x0007000D #define UDMA_CH13_RESERVED8 0x0008000D // // Channel 14 // #define UDMA_CH14_ADC0_0 0x0000000E #define UDMA_CH14_TIMER2A 0x0001000E #define UDMA_CH14_SSI3RX 0x0002000E #define UDMA_CH14_GPIOE 0x0003000E #define UDMA_CH14_GPIOM 0x0004000E #define UDMA_CH14_AES0DIN 0x0005000E #define UDMA_CH14_RESERVED6 0x0006000E #define UDMA_CH14_RESERVED7 0x0007000E #define UDMA_CH14_RESERVED8 0x0008000E // // Channel 15 // #define UDMA_CH15_ADC0_1 0x0000000F #define UDMA_CH15_TIMER2B 0x0001000F #define UDMA_CH15_SSI3TX 0x0002000F #define UDMA_CH15_GPIOF 0x0003000F #define UDMA_CH15_GPION 0x0004000F #define UDMA_CH15_AES0DOUT 0x0005000F #define UDMA_CH15_RESERVED6 0x0006000F #define UDMA_CH15_RESERVED7 0x0007000F #define UDMA_CH15_RESERVED8 0x0008000F // // Channel 16 // #define UDMA_CH16_ADC0_2 0x00000010 #define UDMA_CH16_RESERVED1 0x00010010 #define UDMA_CH16_UART3RX 0x00020010 #define UDMA_CH16_RESERVED3 0x00030010 #define UDMA_CH16_GPIOP 0x00040010 #define UDMA_CH16_RESERVED5 0x00050010 #define UDMA_CH16_RESERVED6 0x00060010 #define UDMA_CH16_RESERVED7 0x00070010 #define UDMA_CH16_RESERVED8 0x00080010 // // Channel 17 // #define UDMA_CH17_ADC0_3 0x00000011 #define UDMA_CH17_RESERVED1 0x00010011 #define UDMA_CH17_UART3TX 0x00020011 #define UDMA_CH17_RESERVED3 0x00030011 #define UDMA_CH17_RESERVED4 0x00040011 #define UDMA_CH17_RESERVED5 0x00050011 #define UDMA_CH17_RESERVED6 0x00060011 #define UDMA_CH17_RESERVED7 0x00070011 #define UDMA_CH17_RESERVED8 0x00080011 // // Channel 18 // #define UDMA_CH18_TIMER0A 0x00000012 #define UDMA_CH18_TIMER1A 0x00010012 #define UDMA_CH18_UART4RX 0x00020012 #define UDMA_CH18_GPIOB 0x00030012 #define UDMA_CH18_I2C3RX 0x00040012 #define UDMA_CH18_RESERVED5 0x00050012 #define UDMA_CH18_RESERVED6 0x00060012 #define UDMA_CH18_RESERVED7 0x00070012 #define UDMA_CH18_RESERVED8 0x00080012 // // Channel 19 // #define UDMA_CH19_TIMER0B 0x00000013 #define UDMA_CH19_TIMER1B 0x00010013 #define UDMA_CH19_UART4TX 0x00020013 #define UDMA_CH19_GPIOG 0x00030013 #define UDMA_CH19_I2C3TX 0x00040013 #define UDMA_CH19_RESERVED5 0x00050013 #define UDMA_CH19_RESERVED6 0x00060013 #define UDMA_CH19_RESERVED7 0x00070013 #define UDMA_CH19_RESERVED8 0x00080013 // // Channel 20 // #define UDMA_CH20_TIMER1A 0x00000014 #define UDMA_CH20_EPI0RX 0x00010014 #define UDMA_CH20_UART7RX 0x00020014 #define UDMA_CH20_GPIOH 0x00030014 #define UDMA_CH20_I2C4RX 0x00040014 #define UDMA_CH20_DES0CIN 0x00050014 #define UDMA_CH20_RESERVED6 0x00060014 #define UDMA_CH20_RESERVED7 0x00070014 #define UDMA_CH20_RESERVED8 0x00080014 // // Channel 21 // #define UDMA_CH21_TIMER1B 0x00000015 #define UDMA_CH21_EPI0TX 0x00010015 #define UDMA_CH21_UART7TX 0x00020015 #define UDMA_CH21_GPIOJ 0x00030015 #define UDMA_CH21_I2C4TX 0x00040015 #define UDMA_CH21_DES0DIN 0x00050015 #define UDMA_CH21_RESERVED6 0x00060015 #define UDMA_CH21_RESERVED7 0x00070015 #define UDMA_CH21_RESERVED8 0x00080015 // // Channel 22 // #define UDMA_CH22_UART1RX 0x00000016 #define UDMA_CH22_RESERVED1 0x00010016 #define UDMA_CH22_RESERVED2 0x00020016 #define UDMA_CH22_RESERVED3 0x00030016 #define UDMA_CH22_I2C5RX 0x00040016 #define UDMA_CH22_DES0DOUT 0x00050016 #define UDMA_CH22_RESERVED6 0x00060016 #define UDMA_CH22_RESERVED7 0x00070016 #define UDMA_CH22_I2C8RX 0x00080016 // // Channel 23 // #define UDMA_CH23_UART1TX 0x00000017 #define UDMA_CH23_RESERVED1 0x00010017 #define UDMA_CH23_RESERVED2 0x00020017 #define UDMA_CH23_RESERVED3 0x00030017 #define UDMA_CH23_I2C5TX 0x00040017 #define UDMA_CH23_RESERVED5 0x00050017 #define UDMA_CH23_RESERVED6 0x00060017 #define UDMA_CH23_RESERVED7 0x00070017 #define UDMA_CH23_I2C8TX 0x00080017 // // Channel 24 // #define UDMA_CH24_SSI1RX 0x00000018 #define UDMA_CH24_ADC1_0 0x00010018 #define UDMA_CH24_RESERVED2 0x00020018 #define UDMA_CH24_RESERVED3 0x00030018 #define UDMA_CH24_GPIOQ 0x00040018 #define UDMA_CH24_RESERVED5 0x00050018 #define UDMA_CH24_RESERVED6 0x00060018 #define UDMA_CH24_RESERVED7 0x00070018 #define UDMA_CH24_I2C9RX 0x00080018 // // Channel 25 // #define UDMA_CH25_SSI1TX 0x00000019 #define UDMA_CH25_ADC1_1 0x00010019 #define UDMA_CH25_RESERVED2 0x00020019 #define UDMA_CH25_RESERVED3 0x00030019 #define UDMA_CH25_GPIOR 0x00040019 #define UDMA_CH25_RESERVED5 0x00050019 #define UDMA_CH25_RESERVED6 0x00060019 #define UDMA_CH25_RESERVED7 0x00070019 #define UDMA_CH25_I2C9TX 0x00080019 // // Channel 26 // #define UDMA_CH26_RESERVED0 0x0000001A #define UDMA_CH26_ADC1_2 0x0001001A #define UDMA_CH26_RESERVED2 0x0002001A #define UDMA_CH26_RESERVED3 0x0003001A #define UDMA_CH26_GPIOS 0x0004001A #define UDMA_CH26_RESERVED5 0x0005001A #define UDMA_CH26_RESERVED6 0x0006001A #define UDMA_CH26_RESERVED7 0x0007001A #define UDMA_CH26_I2C6RX 0x0008001A // // Channel 27 // #define UDMA_CH27_RESERVED0 0x0000001B #define UDMA_CH27_ADC1_3 0x0001001B #define UDMA_CH27_RESERVED2 0x0002001B #define UDMA_CH27_RESERVED3 0x0003001B #define UDMA_CH27_RESERVED4 0x0004001B #define UDMA_CH27_RESERVED5 0x0005001B #define UDMA_CH27_GPIOT 0x0006001B #define UDMA_CH27_RESERVED7 0x0007001B #define UDMA_CH27_I2C6TX 0x0008001B // // Channel 28 // #define UDMA_CH28_RESERVED0 0x0000001C #define UDMA_CH28_RESERVED1 0x0001001C #define UDMA_CH28_RESERVED2 0x0002001C #define UDMA_CH28_RESERVED3 0x0003001C #define UDMA_CH28_RESERVED4 0x0004001C #define UDMA_CH28_RESERVED5 0x0005001C #define UDMA_CH28_RESERVED6 0x0006001C #define UDMA_CH28_RESERVED7 0x0007001C #define UDMA_CH28_I2C7RX 0x0008001C // // Channel 29 // #define UDMA_CH29_RESERVED0 0x0000001D #define UDMA_CH29_RESERVED1 0x0001001D #define UDMA_CH29_RESERVED2 0x0002001D #define UDMA_CH29_RESERVED3 0x0003001D #define UDMA_CH29_RESERVED4 0x0004001D #define UDMA_CH29_RESERVED5 0x0005001D #define UDMA_CH29_RESERVED6 0x0006001D #define UDMA_CH29_RESERVED7 0x0007001D #define UDMA_CH29_I2C7TX 0x0008001D // // Channel 30 // #define UDMA_CH30_SW 0x0000001E #define UDMA_CH30_RESERVED1 0x0001001E #define UDMA_CH30_RESERVED2 0x0002001E #define UDMA_CH30_RESERVED3 0x0003001E #define UDMA_CH30_RESERVED4 0x0004001E #define UDMA_CH30_RESERVED5 0x0005001E #define UDMA_CH30_RESERVED6 0x0006001E #define UDMA_CH30_EPI0RX 0x0007001E #define UDMA_CH30_1WIRE0 0x0008001E // // Channel 31 // #define UDMA_CH31_RESERVED0 0x0000001F #define UDMA_CH31_RESERVED1 0x0001001F #define UDMA_CH31_RESERVED2 0x0002001F #define UDMA_CH31_RESERVED3 0x0003001F #define UDMA_CH31_RESERVED4 0x0004001F #define UDMA_CH31_RESERVED5 0x0005001F #define UDMA_CH31_RESERVED6 0x0006001F #define UDMA_CH31_EPI0RX 0x0007001F #define UDMA_CH31_RESERVED8 0x0008001F //***************************************************************************** // // API Function prototypes // //***************************************************************************** extern void uDMAInit(void); extern void uDMAEnable(void); extern void uDMADisable(void); extern uint32_t uDMAErrorStatusGet(void); extern void uDMAErrorStatusClear(void); extern void uDMAChannelEnable(uint32_t ui32ChannelNum); extern void uDMAChannelDisable(uint32_t ui32ChannelNum); extern bool uDMAChannelIsEnabled(uint32_t ui32ChannelNum); extern void uDMAControlBaseSet(void *pControlTable); extern void *uDMAControlBaseGet(void); extern void *uDMAControlAlternateBaseGet(void); extern void uDMAChannelRequest(uint32_t ui32ChannelNum); extern void uDMAChannelAttributeEnable(uint32_t ui32ChannelNum, uint32_t ui32Attr); extern void uDMAChannelAttributeDisable(uint32_t ui32ChannelNum, uint32_t ui32Attr); extern uint32_t uDMAChannelAttributeGet(uint32_t ui32ChannelNum); extern void uDMAChannelControlSet(uint32_t ui32ChannelStructIndex, uint32_t ui32Control); extern void uDMAChannelTransferSet(uint32_t ui32ChannelStructIndex, uint32_t ui32Mode, void *pvSrcAddr, void *pvDstAddr, uint32_t ui32TransferSize); extern void uDMAChannelScatterGatherSet(uint32_t ui32ChannelNum, uint32_t ui32TaskCount, void *pvTaskList, uint32_t ui32IsPeriphSG); extern uint32_t uDMAChannelSizeGet(uint32_t ui32ChannelStructIndex); extern uint32_t uDMAChannelModeGet(uint32_t ui32ChannelStructIndex); extern void uDMAIntRegister(uint32_t ui32IntChannel, void (*pfnHandler)(void)); extern void uDMAIntUnregister(uint32_t ui32IntChannel); extern void uDMAChannelAssign(uint32_t ui32Mapping); 以下是我写的spi.c #include "spi.h" #include "ti/devices/msp432e4/driverlib/inc/hw_ssi.h" #include "uart.h" #include "delay.h" #include "uartstdio.h" #include "system_init.h" void SPI_Init(void) { SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD); while(!SysCtlPeripheralReady(SYSCTL_PERIPH_SSI2)) {} while(!SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOD)) {} GPIOPinConfigure(GPIO_PD0_SSI2XDAT1); // PD0作为SSI2数据线1 GPIOPinConfigure(GPIO_PD1_SSI2XDAT0); // PD1作为SSI2数据线0 GPIOPinConfigure(GPIO_PD2_SSI2FSS); // PD2作为片选(可选) GPIOPinConfigure(GPIO_PD3_SSI2CLK); // PD3作为时钟 GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3); SSIConfigSetExpClk(SSI2_BASE, ui32SysClock, SSI_FRF_MOTO_MODE_0,SSI_MODE_MASTER, 30000000, 8); // 30MHz, 8数据 SSIEnable(SSI2_BASE); } uint8_t SPI_TransferByte(uint8_t data) { uint32_t rxData; // 发送数据 //SSIDataPut(SSI2_BASE, data); SSIDataPutNonBlocking(SSI2_BASE, data); // 等待传输完成并获取接收数据 while(SSIBusy(SSI2_BASE)) {} //SSIDataGet(SSI2_BASE, &rxData); SSIDataGetNonBlocking(SSI2_BASE, &rxData); return (uint8_t)rxData; } void SPI_WriteByte(uint8_t ByteSend) { SPI_TransferByte(ByteSend); // 对于只写操作,忽略返回值 } uint8_t SPI_ReadByte(void) { return SPI_TransferByte(0xFF); // 发送虚拟字节以读取数据 } 以下是我写的lcd.c #include "lcd.h" #include "delay.h" #include "uart.h" #include "uartstdio.h" uint16_t POINT_COLOR = 0x0000,BACK_COLOR = 0xFFFF; uint16_t DeviceCode; lcd_dev lcddev; void LCD_W_LED(uint8_t n) { if(n==1) { GPIOPinWrite(GPIO_PORTL_BASE, GPIO_PIN_0, GPIO_PIN_0); } if(n==0) { GPIOPinWrite(GPIO_PORTL_BASE, GPIO_PIN_0, 0); } } void LCD_W_RST(uint8_t n) { if(n==1) { GPIOPinWrite(GPIO_PORTL_BASE, GPIO_PIN_1, GPIO_PIN_1); } if(n==0) { GPIOPinWrite(GPIO_PORTL_BASE, GPIO_PIN_1, 0); } } void LCD_W_DC(uint8_t n) { if(n==1) { GPIOPinWrite(GPIO_PORTL_BASE, GPIO_PIN_2, GPIO_PIN_2); } if(n==0) { GPIOPinWrite(GPIO_PORTL_BASE, GPIO_PIN_2, 0); } } void LCD_WR_REG(uint8_t data) { LCD_W_DC(0); SPI_WriteByte(data); } void LCD_WR_DATA(uint8_t data) { LCD_W_DC(1); SPI_WriteByte(data); } void LCD_WriteReg(uint8_t LCD_Reg, uint16_t LCD_RegValue) { LCD_WR_REG(LCD_Reg); LCD_WR_DATA(LCD_RegValue); } void LCD_WriteRAM_Prepare(void) { LCD_WR_REG(lcddev.wramcmd); } void Lcd_WriteData_16Bit(uint16_t Data) { LCD_WR_DATA((Data>>8)&0xF8);//RED LCD_WR_DATA((Data>>3)&0xFC);//GREEN LCD_WR_DATA(Data<<3);//BLUE } void LCD_DrawPoint(uint16_t x,uint16_t y) { LCD_SetCursor(x,y);//设置光标置 Lcd_WriteData_16Bit(POINT_COLOR); } void LCD_Clear(uint16_t Color) { unsigned int i,m; LCD_SetWindows(0,0,lcddev.width-1,lcddev.height-1); LCD_W_DC(1); for(i=0;i<lcddev.height;i++) { for(m=0;m<lcddev.width;m++) { Lcd_WriteData_16Bit(Color); } } } void LCD_GPIOInit(void) { SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOL);//GPIOB的时钟 while (!SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOL)) { } GPIOPinTypeGPIOOutput(GPIO_PORTL_BASE, GPIO_PIN_0); GPIOPinTypeGPIOOutput(GPIO_PORTL_BASE, GPIO_PIN_1); GPIOPinTypeGPIOOutput(GPIO_PORTL_BASE, GPIO_PIN_2); } void LCD_RESET(void) { LCD_W_RST(1); delay_ms(50); LCD_W_RST(0); delay_ms(100); LCD_W_RST(1); delay_ms(50); } void LCD_Init(void) { SPI_Init(); LCD_GPIOInit(); LCD_RESET(); LCD_WR_REG(0XF7); LCD_WR_DATA(0xA9); LCD_WR_DATA(0x51); LCD_WR_DATA(0x2C); LCD_WR_DATA(0x82); LCD_WR_REG(0xC0); LCD_WR_DATA(0x11); LCD_WR_DATA(0x09); LCD_WR_REG(0xC1); LCD_WR_DATA(0x41); LCD_WR_REG(0XC5); LCD_WR_DATA(0x00); LCD_WR_DATA(0x0A); LCD_WR_DATA(0x80); LCD_WR_REG(0xB1); LCD_WR_DATA(0xB0); LCD_WR_DATA(0x11); LCD_WR_REG(0xB4); LCD_WR_DATA(0x02); LCD_WR_REG(0xB6); LCD_WR_DATA(0x02); LCD_WR_DATA(0x42); LCD_WR_REG(0xB7); LCD_WR_DATA(0xc6); LCD_WR_REG(0xBE); LCD_WR_DATA(0x00); LCD_WR_DATA(0x04); LCD_WR_REG(0xE9); LCD_WR_DATA(0x00); LCD_WR_REG(0x36); LCD_WR_DATA((1<<3)|(0<<7)|(1<<6)|(1<<5)); LCD_WR_REG(0x3A); LCD_WR_DATA(0x66); LCD_WR_REG(0xE0); LCD_WR_DATA(0x00); LCD_WR_DATA(0x07); LCD_WR_DATA(0x10); LCD_WR_DATA(0x09); LCD_WR_DATA(0x17); LCD_WR_DATA(0x0B); LCD_WR_DATA(0x41); LCD_WR_DATA(0x89); LCD_WR_DATA(0x4B); LCD_WR_DATA(0x0A); LCD_WR_DATA(0x0C); LCD_WR_DATA(0x0E); LCD_WR_DATA(0x18); LCD_WR_DATA(0x1B); LCD_WR_DATA(0x0F); LCD_WR_REG(0XE1); LCD_WR_DATA(0x00); LCD_WR_DATA(0x17); LCD_WR_DATA(0x1A); LCD_WR_DATA(0x04); LCD_WR_DATA(0x0E); LCD_WR_DATA(0x06); LCD_WR_DATA(0x2F); LCD_WR_DATA(0x45); LCD_WR_DATA(0x43); LCD_WR_DATA(0x02); LCD_WR_DATA(0x0A); LCD_WR_DATA(0x09); LCD_WR_DATA(0x32); LCD_WR_DATA(0x36); LCD_WR_DATA(0x0F); LCD_WR_REG(0x11); LCD_WR_REG(0x29); LCD_direction(USE_HORIZONTAL);//设置LCD显示方向 LCD_W_LED(1);//点亮背光 LCD_Clear(BLUE);//清全屏白色 } void LCD_SetWindows(uint16_t xStar, uint16_t yStar,uint16_t xEnd,uint16_t yEnd) { LCD_WR_REG(lcddev.setxcmd); LCD_WR_DATA(xStar>>8); LCD_WR_DATA(0x00FF&xStar); LCD_WR_DATA(xEnd>>8); LCD_WR_DATA(0x00FF&xEnd); LCD_WR_REG(lcddev.setycmd); LCD_WR_DATA(yStar>>8); LCD_WR_DATA(0x00FF&yStar); LCD_WR_DATA(yEnd>>8); LCD_WR_DATA(0x00FF&yEnd); LCD_WriteRAM_Prepare(); //开始写入GRAM } void LCD_SetCursor(uint16_t Xpos, uint16_t Ypos) { LCD_SetWindows(Xpos,Ypos,Xpos,Ypos); } void LCD_direction(uint8_t direction) { lcddev.setxcmd=0x2A; lcddev.setycmd=0x2B; lcddev.wramcmd=0x2C; switch(direction){ case 0: lcddev.width=LCD_W; lcddev.height=LCD_H; LCD_WriteReg(0x36,(1<<3)|(0<<6)|(0<<7));//BGR==1,MY==0,MX==0,MV==0 break; case 1: lcddev.width=LCD_H; lcddev.height=LCD_W; LCD_WriteReg(0x36,(1<<3)|(0<<7)|(1<<6)|(1<<5));//BGR==1,MY==1,MX==0,MV==1 break; case 2: lcddev.width=LCD_W; lcddev.height=LCD_H; LCD_WriteReg(0x36,(1<<3)|(1<<6)|(1<<7));//BGR==1,MY==0,MX==0,MV==0 break; case 3: lcddev.width=LCD_H; lcddev.height=LCD_W; LCD_WriteReg(0x36,(1<<3)|(1<<7)|(1<<5));//BGR==1,MY==1,MX==0,MV==1 break; default:break; } } void LCD_SimpleTest(void) { // 初始化GPIO和SPI SPI_Init(); LCD_GPIOInit(); // 复序列 LCD_W_RST(0); delay_ms(100); LCD_W_RST(1); delay_ms(120); // 仅发送最基本的初始化命令 LCD_WR_REG(0x11); // 睡眠退出 delay_ms(120); LCD_WR_REG(0x29); // 开启显示 delay_ms(50); // 设置方向 LCD_direction(USE_HORIZONTAL); // 开启背光 LCD_W_LED(1); // 清除屏幕为红色 LCD_Clear(RED); // 绘制一个点 LCD_DrawPoint(50, 50); } void Gui_Drawbmp16(uint16_t x,uint16_t y,const unsigned char *p) //显示480*320 QQ图片 { uint32_t i; uint16_t color; // 设置显示窗(480x320) LCD_SetWindows(x, y, x + 480 - 1, y + 320 - 1); // 逐像素写入(Image2Lcd 水平扫描,在前) for (i = 0; i < 480 * 320; i++) { color = (*(p + i * 2 + 1) << 8) | *(p + i * 2); // 组合为 RGB565 Lcd_WriteData_16Bit(color); } // 恢复默认窗(可选) // LCD_SetWindows(0, 0, lcddev.width - 1, lcddev.height - 1); } 提供完毕。
最新发布
07-10
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