LehaMi的博客

原创 HDLBits Exams/2014 q3fsm

module top_module ( input clk, input reset, // Synchronous reset input s, input w, output z ); parameter A=0,B=1; reg state,next_state; reg z_next; reg [1:0]count,next_count,next_ocount,ocount;//count 用来对B的...