`timescale 1ns/1ps
module fft_sim(
);
reg clk;
reg rst_n;
reg [7 : 0] s_axis_config_tdata;
reg s_axis_config_tvalid;
wire s_axis_config_tready;
reg [15 : 0] s_axis_data_tdata_img,s_axis_data_tdata_real; //signed(1.15)
reg s_axis_data_tvalid;
wire s_axis_data_tready;
reg s_axis_data_tlast;
wire [26 : 0] m_axis_data_tdata_img,m_axis_data_tdata_real;
reg[63:0] m_axis_data_tdata;
wire [31 : 27] m_axis_data_null;
wire [63:59] null;
wire m_axis_data_tvalid;
wire m_axis_data_tlast;
wire [15:0]m_axis_data_tuser;
//xilinx pg109-xfft.pdf page24
parameter FFTCONFIG_FWD_INV_FFT = 1'b1; //FFT
parameter FFTCONFIG_FWD_INV_IFFT = 1'b0; //IFFT
//FFT IP Core
wire event_frame_started;
wire event_tlast_unexpected;
wire event_tlast_missing;
wire event_data_in_channel_halt;
xfft_0 uut_xfft_0 (
.aclk (clk), // input wire aclk
.s_axis_config_tdata (s_axis_config_tdata), // input wire [7 : 0] s_axis_config_tdata
.s_axis_config_tvalid (s_axis_config_tvalid), // input wire s_axis_config_tvalid
.s_axis_config_tready (s_axis_config_tready), // output wire s_axis_config_tready
.s_axis_data_tdata ({s_axis_data_tdata_img,s_axis_data_tdata_real}), // input wire [31 : 0] s_axis_data_tdata
.s_axis_data_tvalid (s_axis_data_tvalid), // input wire s_axis_data_tvalid
.s_axis_data_tready (s_axis_data_tready), // output wire s_axis_data_tready
.s_axis_data_tlast (s_axis_data_tlast), // input wire s_axis_data_tlast
.m_axis_data_tdata ({null,m_axis_data_tdata_img,m_axis_data_null,m_axis_data_tdata_real}),
.m_axis_data_tuser(m_axis_data_tuser), // output wire [63 : 0] m_axis_data_tdata
.m_axis_data_tvalid (m_axis_data_tvalid), // output wire m_axis_data_tvalid
.m_axis_data_tlast (m_axis_data_tlast), // output wire m_axis_data_tlast
.event_frame_started (event_frame_started), // output wire event_frame_started
.event_tlast_unexpected (event_tlast_unexpected), // output wire event_tlast_unexpected
.event_tlast_missing (event_tlast_missing), // output wire event_tlast_missing
.event_data_in_channel_halt (event_data_in_channel_halt) // output wire event_data_in_channel_halt
);
integer i,j;
reg[15:0] data_mem [0:999];
initial #500 $readmemh("E:/Matlab/R2021/bin/shiyan/test_4/time_domain_cos.txt", data_mem);
initial begin
clk = 0;
rst_n = 0;
s_axis_config_tdata <= 8'd0;
s_axis_config_tvalid <= 1'b0;
s_axis_data_tdata_img <= 16'd0;
s_axis_data_tdata_real <= 16'd0;
s_axis_data_tvalid <= 1'b0;
s_axis_data_tlast <= 1'b0;
#1000;
@(posedge clk);
s_axis_config_tdata <= {7'd0,FFTCONFIG_FWD_INV_FFT};
s_axis_config_tvalid <= 1'b1;
repeat(2) begin @(posedge clk); end
s_axis_config_tvalid <= 1'b0;
#1000;
@(posedge clk);
i <= 1;
#10000;
@(posedge clk);
#100_0000;
$fclose(w1_file);
$fclose(w2_file);
#1000;
$stop;
end
always @(*) begin
if((i>0) && (i<1001))
s_axis_data_tdata_real <= $signed(data_mem[i-1]);
else s_axis_data_tdata_real <= 16'd0;
end
always @(posedge clk) begin
if(i == 0) i <= 0;
else if(i <= 1024)
begin
if(s_axis_data_tready && s_axis_data_tvalid) i <= i+1;
else ;
end
else if(i < 1050) i <= i+1;
else ;
end
always @(posedge clk)
begin
if((i>=1) && (i<=1024)) s_axis_data_tvalid <= 1'b1;
else s_axis_data_tvalid <= 1'b0;
end
always @(posedge clk)
begin
if(i==1024) s_axis_data_tlast <= 1'b1;
else s_axis_data_tlast <= 1'b0;
end
always #10 clk = ~clk;
integer w1_file,w2_file;
initial w1_file = $fopen("E:/FPGA/fft_result_reals.txt","w");
initial w2_file = $fopen("E:/FPGA/fft_result_images.txt","w");
always @(posedge clk)
begin
if(m_axis_data_tvalid)
begin
m_axis_data_tdata<={null ,m_axis_data_tdata_img,m_axis_data_null,m_axis_data_tdata_real};
$fwrite(w1_file, "%d\n", m_axis_data_tdata_real);
$fwrite(w2_file, "%d\n", m_axis_data_tdata_img);
$display("%d , %d",m_axis_data_tdata_real,m_axis_data_tdata_img);
end
end
endmodule`timescale 1ns/1ps
module fft_sim(
);
reg clk;
reg rst_n;
reg [7 : 0] s_axis_config_tdata;
reg s_axis_config_tvalid;
wire s_axis_config_tready;
reg [15 : 0] s_axis_data_tdata_img,s_axis_data_tdata_real; //signed(1.15)
reg s_axis_data_tvalid;
wire s_axis_data_tready;
reg s_axis_data_tlast;
wire [26 : 0] m_axis_data_tdata_img,m_axis_data_tdata_real;
reg[63:0] m_axis_data_tdata;
wire [31 : 27] m_axis_data_null;
wire [63:59] null;
wire m_axis_data_tvalid;
wire m_axis_data_tlast;
wire [15:0]m_axis_data_tuser;
//xilinx pg109-xfft.pdf page24
parameter FFTCONFIG_FWD_INV_FFT = 1'b1; //FFT
parameter FFTCONFIG_FWD_INV_IFFT = 1'b0; //IFFT
//FFT IP Core
wire event_frame_started;
wire event_tlast_unexpected;
wire event_tlast_missing;
wire event_data_in_channel_halt;
xfft_0 uut_xfft_0 (
.aclk (clk), // input wire aclk
.s_axis_config_tdata (s_axis_config_tdata), // input wire [7 : 0] s_axis_config_tdata
.s_axis_config_tvalid (s_axis_config_tvalid), // input wire s_axis_config_tvalid
.s_axis_config_tready (s_axis_config_tready), // output wire s_axis_config_tready
.s_axis_data_tdata ({s_axis_data_tdata_img,s_axis_data_tdata_real}), // input wire [31 : 0] s_axis_data_tdata
.s_axis_data_tvalid (s_axis_data_tvalid), // input wire s_axis_data_tvalid
.s_axis_data_tready (s_axis_data_tready), // output wire s_axis_data_tready
.s_axis_data_tlast (s_axis_data_tlast), // input wire s_axis_data_tlast
.m_axis_data_tdata ({null,m_axis_data_tdata_img,m_axis_data_null,m_axis_data_tdata_real}),
.m_axis_data_tuser(m_axis_data_tuser), // output wire [63 : 0] m_axis_data_tdata
.m_axis_data_tvalid (m_axis_data_tvalid), // output wire m_axis_data_tvalid
.m_axis_data_tlast (m_axis_data_tlast), // output wire m_axis_data_tlast
.event_frame_started (event_frame_started), // output wire event_frame_started
.event_tlast_unexpected (event_tlast_unexpected), // output wire event_tlast_unexpected
.event_tlast_missing (event_tlast_missing), // output wire event_tlast_missing
.event_data_in_channel_halt (event_data_in_channel_halt) // output wire event_data_in_channel_halt
);
integer i,j;
reg[15:0] data_mem [0:999];
initial #500 $readmemh("E:/Matlab/R2021/bin/shiyan/test_4/time_domain_cos.txt", data_mem);
initial begin
clk = 0;
rst_n = 0;
s_axis_config_tdata <= 8'd0;
s_axis_config_tvalid <= 1'b0;
s_axis_data_tdata_img <= 16'd0;
s_axis_data_tdata_real <= 16'd0;
s_axis_data_tvalid <= 1'b0;
s_axis_data_tlast <= 1'b0;
#1000;
@(posedge clk);
s_axis_config_tdata <= {7'd0,FFTCONFIG_FWD_INV_FFT};
s_axis_config_tvalid <= 1'b1;
repeat(2) begin @(posedge clk); end
s_axis_config_tvalid <= 1'b0;
#1000;
@(posedge clk);
i <= 1;
#10000;
@(posedge clk);
#100_0000;
$fclose(w1_file);
$fclose(w2_file);
#1000;
$stop;
end
always @(*) begin
if((i>0) && (i<1001))
s_axis_data_tdata_real <= $signed(data_mem[i-1]);
else s_axis_data_tdata_real <= 16'd0;
end
always @(posedge clk) begin
if(i == 0) i <= 0;
else if(i <= 1024)
begin
if(s_axis_data_tready && s_axis_data_tvalid) i <= i+1;
else ;
end
else if(i < 1050) i <= i+1;
else ;
end
always @(posedge clk)
begin
if((i>=1) && (i<=1024)) s_axis_data_tvalid <= 1'b1;
else s_axis_data_tvalid <= 1'b0;
end
always @(posedge clk)
begin
if(i==1024) s_axis_data_tlast <= 1'b1;
else s_axis_data_tlast <= 1'b0;
end
always #10 clk = ~clk;
integer w1_file,w2_file;
initial w1_file = $fopen("E:/FPGA/fft_result_reals.txt","w");
initial w2_file = $fopen("E:/FPGA/fft_result_images.txt","w");
always @(posedge clk)
begin
if(m_axis_data_tvalid)
begin
m_axis_data_tdata<={null ,m_axis_data_tdata_img,m_axis_data_null,m_axis_data_tdata_real};
$fwrite(w1_file, "%d\n", m_axis_data_tdata_real);
$fwrite(w2_file, "%d\n", m_axis_data_tdata_img);
$display("%d , %d",m_axis_data_tdata_real,m_axis_data_tdata_img);
end
end
endmodule这是我的FPGA端的代码，进行的是1024点的fft，输入采用的是fixed point形式，现在我想提高fft计算精度想要将输入变成floating point 并且进行2048点的fft，我该怎么改代码呢
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