Chinese translated version of Documentation-io_ordering.txt
If you have any comment or update to the content, please contact the
original document maintainer directly. However, if you have a problem
communicating in English you can also ask the Chinese maintainer for
help. Contact the Chinese maintainer if this translation is outdated
or if there is a problem with the translation.
Chinese maintainer: 李仁亨 <154778998@qq.com>
---------------------------------------------------------------------
Documentation-io_ordering.txt 的中文翻译
如果想评论或更新本文的内容,请直接联系原文档的维护者。如果你使用英文
交流有困难的话,也可以向中文版维护者求助。如果本翻译更新不及时或者翻
译存在问题,请联系中文版维护者。
中文版维护者: 李仁亨 <154778998@qq.com>
中文版翻译者: 李仁亨 <154778998@qq.com>
中文版校译者: 李仁亨 <154778998@qq.com>
以下为正文
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On some platforms, so-called memory-mapped I/O is weakly ordered. On such
platforms, driver writers are responsible for ensuring that I/O writes to
memory-mapped addresses on their device arrive in the order intended. This is
typically done by reading a 'safe' device or bridge register, causing the I/O
chipset to flush pending writes to the device before any reads are posted. A
driver would usually use this technique immediately prior to the exit of a
critical section of code protected by spinlocks. This would ensure that
subsequent writes to I/O space arrived only after all prior writes (much like a
memory barrier op, mb(), only with respect to I/O).
在某些平台上,所谓的内存映射I/O是弱有序。在这样的
平台,驱动程序编写者有责任确保I/O根据他们设备到达的顺序写入
存储器映射地址。这是
通常是通过读“安全”设备或桥梁寄存器,在读操作之前,使I/O
芯片组刷新等待写操作设备。
在进程从受自旋锁保护的临界区代码退出之前,驱动程序通常会立即使用这种技术。
这将确保对I/O空间后续写操作,在之前的写操作之后到达(很像只是考虑到I/O
的内存屏障运算,mb()) 。
A more concrete example from a hypothetical device driver:
一个更具体的例子,假设设备驱动程序:
...
CPU A: spin_lock_irqsave(&dev_lock, flags)
CPU A: val = readl(my_status);
CPU A: ...
CPU A: writel(newval, ring_ptr);
CPU A: spin_unlock_irqrestore(&dev_lock, flags)
...
CPU B: spin_lock_irqsave(&dev_lock, flags)
CPU B: val = readl(my_status);
CPU B: ...
CPU B: writel(newval2, ring_ptr);
CPU B: spin_unlock_irqrestore(&dev_lock, flags)
...
In the case above, the device may receive newval2 before it receives newval,
which could cause problems. Fixing it is easy enough though:
在上述情况下,该设备可能会在收到newval之前收到newval2 ,
这可能会产生问题。可以这样修复:
...
CPU A: spin_lock_irqsave(&dev_lock, flags)
CPU A: val = readl(my_status);
CPU A: ...
CPU A: writel(newval, ring_ptr);
CPU A: (void)readl(safe_register); /* maybe a config register? */
CPU A: spin_unlock_irqrestore(&dev_lock, flags)
...
CPU B: spin_lock_irqsave(&dev_lock, flags)
CPU B: val = readl(my_status);
CPU B: ...
CPU B: writel(newval2, ring_ptr);
CPU B: (void)readl(safe_register); /* maybe a config register? */
CPU B: spin_unlock_irqrestore(&dev_lock, flags)
Here, the reads from safe_register will cause the I/O chipset to flush any
pending writes before actually posting the read to the chipset, preventing
possible data corruption.
这里,从safe_register读取会使对I/O芯片组提出读操作之前
刷新所有等待写操作,从而防止了可能的数据损坏。
If you have any comment or update to the content, please contact the
original document maintainer directly. However, if you have a problem
communicating in English you can also ask the Chinese maintainer for
help. Contact the Chinese maintainer if this translation is outdated
or if there is a problem with the translation.
Chinese maintainer: 李仁亨 <154778998@qq.com>
---------------------------------------------------------------------
Documentation-io_ordering.txt 的中文翻译
如果想评论或更新本文的内容,请直接联系原文档的维护者。如果你使用英文
交流有困难的话,也可以向中文版维护者求助。如果本翻译更新不及时或者翻
译存在问题,请联系中文版维护者。
中文版维护者: 李仁亨 <154778998@qq.com>
中文版翻译者: 李仁亨 <154778998@qq.com>
中文版校译者: 李仁亨 <154778998@qq.com>
以下为正文
---------------------------------------------------------------------
On some platforms, so-called memory-mapped I/O is weakly ordered. On such
platforms, driver writers are responsible for ensuring that I/O writes to
memory-mapped addresses on their device arrive in the order intended. This is
typically done by reading a 'safe' device or bridge register, causing the I/O
chipset to flush pending writes to the device before any reads are posted. A
driver would usually use this technique immediately prior to the exit of a
critical section of code protected by spinlocks. This would ensure that
subsequent writes to I/O space arrived only after all prior writes (much like a
memory barrier op, mb(), only with respect to I/O).
在某些平台上,所谓的内存映射I/O是弱有序。在这样的
平台,驱动程序编写者有责任确保I/O根据他们设备到达的顺序写入
存储器映射地址。这是
通常是通过读“安全”设备或桥梁寄存器,在读操作之前,使I/O
芯片组刷新等待写操作设备。
在进程从受自旋锁保护的临界区代码退出之前,驱动程序通常会立即使用这种技术。
这将确保对I/O空间后续写操作,在之前的写操作之后到达(很像只是考虑到I/O
的内存屏障运算,mb()) 。
A more concrete example from a hypothetical device driver:
一个更具体的例子,假设设备驱动程序:
...
CPU A: spin_lock_irqsave(&dev_lock, flags)
CPU A: val = readl(my_status);
CPU A: ...
CPU A: writel(newval, ring_ptr);
CPU A: spin_unlock_irqrestore(&dev_lock, flags)
...
CPU B: spin_lock_irqsave(&dev_lock, flags)
CPU B: val = readl(my_status);
CPU B: ...
CPU B: writel(newval2, ring_ptr);
CPU B: spin_unlock_irqrestore(&dev_lock, flags)
...
In the case above, the device may receive newval2 before it receives newval,
which could cause problems. Fixing it is easy enough though:
在上述情况下,该设备可能会在收到newval之前收到newval2 ,
这可能会产生问题。可以这样修复:
...
CPU A: spin_lock_irqsave(&dev_lock, flags)
CPU A: val = readl(my_status);
CPU A: ...
CPU A: writel(newval, ring_ptr);
CPU A: (void)readl(safe_register); /* maybe a config register? */
CPU A: spin_unlock_irqrestore(&dev_lock, flags)
...
CPU B: spin_lock_irqsave(&dev_lock, flags)
CPU B: val = readl(my_status);
CPU B: ...
CPU B: writel(newval2, ring_ptr);
CPU B: (void)readl(safe_register); /* maybe a config register? */
CPU B: spin_unlock_irqrestore(&dev_lock, flags)
Here, the reads from safe_register will cause the I/O chipset to flush any
pending writes before actually posting the read to the chipset, preventing
possible data corruption.
这里,从safe_register读取会使对I/O芯片组提出读操作之前
刷新所有等待写操作,从而防止了可能的数据损坏。