<?xml version="1.0" encoding="utf-8" ?><rss version="2.0"><channel><title><![CDATA[zuoph的博客]]></title><description><![CDATA[物联网硬件和软件+FPGA+AI]]></description><link>https://blog.youkuaiyun.com/zuoph</link><language>zh-cn</language><generator>https://blog.youkuaiyun.com/</generator><copyright><![CDATA[Copyright &copy; zuoph]]></copyright><item><title><![CDATA[GPT-5国内免费体验]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/150701049</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/150701049</guid><author>zuoph</author><pubDate>Sun, 24 Aug 2025 14:36:54 +0800</pubDate><description><![CDATA[免费体验GPT-5]]></description><category></category></item><item><title><![CDATA[AD常见报错解决方案-01-Resolving Un-Routed Net Dead Copper DRC Violations]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/148805422</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/148805422</guid><author>zuoph</author><pubDate>Sat, 21 Jun 2025 10:03:58 +0800</pubDate><description><![CDATA[摘要：本文介绍Altium Designer中因死铜或零面积区域导致的&quot;Un-Routed Net&quot; DRC违规问题。提供两种解决方案：对于AD22及以上版本，推荐使用Health Check Monitor自动检测修复；对于旧版本，可通过PCB Rules And Violations面板手动删除违规对象，并利用PCB list面板二次确认。文章包含详细操作步骤和界面截图，帮助用户快速定位并解决此类设计问题。（149字）]]></description><category></category></item><item><title><![CDATA[PCB设计杂谈之一]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/148654779</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/148654779</guid><author>zuoph</author><pubDate>Sat, 14 Jun 2025 17:22:42 +0800</pubDate><description><![CDATA[本文讨论了PCB设计中电容相关的关键概念：1)介绍了两种常见PCB电容形态及计算公式，涉及介电常数和特征阻抗；2)给出容抗和感抗计算公式，指出高频信号与低频信号的不同回流路径特性；3)强调信号回流路径对完整性和EMC的重要性，并以功率放大器为例说明寄生电容的回流作用；4)总结了电容计算、阻抗分析和回流路径等基础知识，为后续PCB设计提供理论参考。文章着重阐释了PCB布局中电容效应对信号传输的影响机制。
]]></description><category></category></item><item><title><![CDATA[deepseek设计硬件电路之设计一个pA级电流测量电路]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/145461535</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/145461535</guid><author>zuoph</author><pubDate>Wed, 05 Feb 2025 20:51:34 +0800</pubDate><description><![CDATA[deepseek设计硬件电路之设计一个pA级电流测量电路]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（mt2015_muxdff）-90]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/144150598</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/144150598</guid><author>zuoph</author><pubDate>Sat, 30 Nov 2024 10:22:36 +0800</pubDate><description><![CDATA[hdlbits系列verilog解答（mt2015_muxdff）-90]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（Exams/m2014 q4d）-89]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/144150485</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/144150485</guid><author>zuoph</author><pubDate>Sat, 30 Nov 2024 10:11:33 +0800</pubDate><description><![CDATA[hdlbits系列verilog解答（Exams/m2014 q4d）-89]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（exams/m2014_q4c）-88]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/144150412</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/144150412</guid><author>zuoph</author><pubDate>Sat, 30 Nov 2024 10:05:54 +0800</pubDate><description><![CDATA[hdlbits系列verilog解答（exams/m2014_q4c）-88]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（Exams/m2014 q4b）-87]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/144146745</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/144146745</guid><author>zuoph</author><pubDate>Fri, 29 Nov 2024 22:07:15 +0800</pubDate><description><![CDATA[hdlbits系列verilog解答（Exams/m2014 q4b）-87]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（Exams/m2014 q4a）-86]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/144146582</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/144146582</guid><author>zuoph</author><pubDate>Fri, 29 Nov 2024 22:02:49 +0800</pubDate><description><![CDATA[hdlbits系列verilog解答（Exams/m2014 q4a）-86]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（Dff16e-同步复位上升沿16位触发器）-85]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/144146096</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/144146096</guid><author>zuoph</author><pubDate>Fri, 29 Nov 2024 21:52:24 +0800</pubDate><description><![CDATA[hdlbits系列verilog解答（Dff8p-同步复位下降沿8位触发器）-85]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（Dff8ar-异步复位上升沿8位触发器）-84]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/144145870</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/144145870</guid><author>zuoph</author><pubDate>Fri, 29 Nov 2024 21:21:45 +0800</pubDate><description><![CDATA[hdlbits系列verilog解答（Dff8ar-异步复位上升沿8位触发器）-84]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（Dff8p-同步复位下降沿8位触发器）-83]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/143273958</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/143273958</guid><author>zuoph</author><pubDate>Sun, 27 Oct 2024 20:28:13 +0800</pubDate><description><![CDATA[hdlbits系列verilog解答（Dff8p-同步复位下降沿8位触发器）-83]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（DFFR-带同步复位D触发器）-82]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/143273790</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/143273790</guid><author>zuoph</author><pubDate>Sun, 27 Oct 2024 20:19:47 +0800</pubDate><description><![CDATA[hdlbits系列verilog解答（DFFR-带同步复位D触发器）-82]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（DFF8-8位D触发器）-81]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/143273663</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/143273663</guid><author>zuoph</author><pubDate>Sun, 27 Oct 2024 20:09:45 +0800</pubDate><description><![CDATA[hdlbits系列verilog解答（DFF8-8位D触发器）-81]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（DFF-D触发器）-80]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/143273422</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/143273422</guid><author>zuoph</author><pubDate>Sun, 27 Oct 2024 20:00:42 +0800</pubDate><description><![CDATA[hdlbits系列verilog解答（DFF-D触发器）-80]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（Exams/ece241 2014 q3）-79]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/143273157</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/143273157</guid><author>zuoph</author><pubDate>Sun, 27 Oct 2024 19:48:14 +0800</pubDate><description><![CDATA[hdlbits系列verilog解答（Exams/ece241 2014 q3）-79]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（Exams/2012 q1g）-78]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/142667384</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/142667384</guid><author>zuoph</author><pubDate>Tue, 01 Oct 2024 15:43:38 +0800</pubDate><description><![CDATA[hdlbits系列verilog解答（Exams/2012 q1g）-78]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（Exams/m2014 q3）-77]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/142666918</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/142666918</guid><author>zuoph</author><pubDate>Tue, 01 Oct 2024 06:53:18 +0800</pubDate><description><![CDATA[d 表示 don’t-care，这意味着您可以选择输出任何方便的值。考虑下面 Karnaugh 映射中所示的函数 f。分别对红圈内的项做积之和，然后化简。]]></description><category></category></item><item><title><![CDATA[USB简介系列-05]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/140393396</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/140393396</guid><author>zuoph</author><pubDate>Sun, 14 Jul 2024 10:13:39 +0800</pubDate><description><![CDATA[USB简介系列-05]]></description><category></category></item><item><title><![CDATA[hdlbits系列verilog解答（Exams/ece241 2013 q2）-76]]></title><link>https://blog.youkuaiyun.com/zuoph/article/details/139318325</link><guid>https://blog.youkuaiyun.com/zuoph/article/details/139318325</guid><author>zuoph</author><pubDate>Thu, 30 May 2024 11:18:57 +0800</pubDate><description><![CDATA[hdlbits系列verilog解答（Exams/ece241 2013 q2）-76]]></description><category></category></item></channel></rss>