// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2021 Netfactory
*/
#include <common.h>
#include <cpu_func.h>
#include <debug_uart.h>
#include <hang.h>
#include <init.h>
#include <asm/global_data.h>
#include <spl.h>
#include <cli.h>
#include <linux/delay.h>
#include <spi_flash.h>
#include <asm/io.h>
#include "nand.h"
//#include "ddr_init.h"
//#if BOOT_OS_LITEOS
/*LITEOS 单NOR,双NOR,片外双BOOT 启动场景1*/
#define CONFIG_NORDOUBOOT_LITEOS_MAIN 0xC0000
#define CONFIG_NORDOUBOOT_LITEOS_BACKUP 0x4C0000
/*LITEOS 单NOR,双NOR,片内,片外*/
#define CONFIG_NORBOOT_LITEOS_MAIN 0x140000
#define CONFIG_NORBOOT_LITEOS_BACKUP 0x540000
//#define CONFIG_NORBOOT_UBOOT_MAIN 0x140000
//#define CONFIG_NORBOOT_UBOOT_BACKUP 0x2C0000
//#else
/*Linux 2M nand 分区大小 片内片外*/
#define CONFIG_2M_NANDBOOT_UBOOT_MAIN 0x600000
#define CONFIG_2M_NANDBOOT_UBOOT_BACKUP 0xE00000
/*Linux 4M nand 分区大小 片内片外*/
#define CONFIG_4M_NANDBOOT_UBOOT_MAIN 0xC00000
#define CONFIG_4M_NANDBOOT_UBOOT_BACKUP 0x1400000
/*Linux FMC1 NOR 双boot*/
#define CONFIG_NORDOUBOOT_UBOOT_MAIN (0x800000 + 0x10000000)
#define CONFIG_NORDOUBOOT_UBOOT_BACKUP (0xC00000 + 0x10000000)
/*Linux FMC1 NOR 片内安全*/
#define CONFIG_NORBOOT_UBOOT_MAIN (0x140000 + 0x10000000)
#define CONFIG_NORBOOT_UBOOT_BACKUP (0x540000 + 0x10000000)
/*片外片内norflash启动 */
//#define CONFIG_NORBOOT_UBOOT_MAIN 0x300000
//#define CONFIG_NORBOOT_UBOOT_BACKUP 0x700000
//#endif
#if 0
/* 片外nor硬件双boot */
#define CONFIG_STARTCODE_NORBOOT_UBOOT_MAIN 0x140000 //to be fix
#define CONFIG_STARTCODE_NORBOOT_UBOOT_BACKUP 0xc00000 //to be fix
/* nand启动 */
#define CONFIG_NANDBOOT_UBOOT_MAIN 0xC00000
#define CONFIG_NANDBOOT_UBOOT_BACKUP 0x1400000
#endif
DECLARE_GLOBAL_DATA_PTR;
unsigned int spl_get_mru_reg(uint64_t addr)
{
return (*(volatile unsigned int*)(addr));
}
unsigned int spl_get_bootsel(void)
{
unsigned int bootsel = spl_get_mru_reg(MRU_CFG1);
return ((bootsel & MRU_CFG1_BOOTSEL_MASK) >> MRU_CFG1_BOOTSEL_SHIFT);
}
#ifdef EXEC_ENV_2125_EVB
unsigned long spl_nor_get_uboot_base(void)
{
unsigned int bootmod = ((spl_get_mru_reg(MRU_CFG1) & MRU_CFG1_BOOTMOD_MASK ) >> MRU_CFG1_BOOTMOD_SHIFT);
unsigned int bootsel1 = (spl_get_bootsel() >> 0x1);
unsigned int mru_remap = spl_get_mru_reg(MRU_REMAP);
unsigned int mru_reg7 = (spl_get_mru_reg(MRU_REG7) & 0x1);
unsigned int ns_forbid = spl_get_mru_reg(SEC_NS_FORBIT);
if (ns_forbid != NONE_SECURE_BOOT_FLAG) {
printf("SPL: secure boot, nsforbid(%u)\n", ns_forbid);
printf("SPL: boot area %s, mrureg7(%u)\n", (mru_reg7 ? "back" : "main"), mru_reg7);
#if BOOT_OS_LITEOS
return (mru_reg7 ? CONFIG_NORBOOT_LITEOS_BACKUP : CONFIG_NORBOOT_LITEOS_MAIN);
#else
return (mru_reg7 ? (CONFIG_NORBOOT_UBOOT_BACKUP - 0x10000000) : (CONFIG_NORBOOT_UBOOT_MAIN - 0x10000000));
#endif
}
/* 片内rom启动 */
if (bootmod == 0x1) {
printf("SPL: boot from %s, bootmod(%u)\n", (bootmod ? "rom" : "norflash"), bootmod);
printf("SPL: boot area %s, mru_reg7(%u)\n", (mru_reg7 ? "backup" : "main"), mru_reg7);
#if BOOT_OS_LITEOS
return (mru_reg7 ? CONFIG_NORBOOT_LITEOS_BACKUP : CONFIG_NORBOOT_LITEOS_MAIN);
#else
return (mru_reg7 ? (CONFIG_NORBOOT_UBOOT_BACKUP - 0x10000000) : (CONFIG_NORBOOT_UBOOT_MAIN - 0x10000000));
#endif
}
printf("SPL: boot from %s, bootsel1(%u)\n", (bootsel1 ? "norflash remap is disabled" : "norflash remap is enabled"), bootsel1);
/* 片外nor双boot启动 */
if (bootsel1 == 0x0) {
printf("SPL: boot %s, mru_remap(%u)\n", (mru_remap ? "backup" : "main"), mru_remap);
#if BOOT_OS_LITEOS
return (mru_reg7 ? CONFIG_NORDOUBOOT_LITEOS_BACKUP : CONFIG_NORDOUBOOT_LITEOS_MAIN);
#else
return (mru_reg7 ? (CONFIG_NORDOUBOOT_UBOOT_BACKUP - 0x10000000) : (CONFIG_NORDOUBOOT_UBOOT_MAIN - 0x10000000));
#endif
}
/* 片外nof启动,带safetycode */
printf("SPL: boot from %s, mru_reg7(%u)\n", (mru_reg7 ? "backup" : "main"), mru_reg7);
#if BOOT_OS_LITEOS
return (mru_reg7 ? CONFIG_NORBOOT_LITEOS_BACKUP : CONFIG_NORBOOT_LITEOS_MAIN);
#else
return (mru_reg7 ? (CONFIG_NORBOOT_UBOOT_BACKUP - 0x10000000) : (CONFIG_NORBOOT_UBOOT_MAIN - 0x10000000));
#endif
}
#else
unsigned int spl_get_spinor_doubleboot(void)
{
unsigned int bootmod = ((spl_get_mru_reg(MRU_CFG1) & MRU_CFG1_BOOTMOD_MASK ) >> MRU_CFG1_BOOTMOD_SHIFT);
unsigned int bootsel = spl_get_bootsel();
unsigned int bootsel0 = (bootsel >> 0 ) & 0x1;
unsigned int bootsel1 = (bootsel >> 1 ) & 0x1;
unsigned int bootsel2 = (bootsel >> 2 ) & 0x1;
unsigned int bootsel3 = (bootsel >> 3 ) & 0x1;
/*仅当片外Nor启动:BOOT_SEL1 表示 SPI Nor双boot使能*/
if (bootmod == 0x0) //片外启动
{
if(bootsel0 == 0 && bootsel2 == 0) //从FMC0 启动 NOR 启动
{
printf_spl("SPL: boot from fmc0 %s, bootsel1(%u)\n", (bootsel1 ? "norflash remap is disabled" : "norflash remap is enabled"), bootsel1);
return 0;
}
if(bootsel0 == 1 && bootsel3 == 1) {//从FMC1 启动 NOR 启动
printf_spl("SPL: boot from fmc1 %s, bootsel1(%u)\n", (bootsel1 ? "norflash remap is disabled" : "norflash remap is enabled"), bootsel1);
return 0;
}
return -1;
}
else {
return -1;
}
}
unsigned long spl_nor_get_uboot_base(void)
{
unsigned int bootmod = ((spl_get_mru_reg(MRU_CFG1) & MRU_CFG1_BOOTMOD_MASK ) >> MRU_CFG1_BOOTMOD_SHIFT);
unsigned int bootsel = spl_get_bootsel();
unsigned int bootsel0 = (bootsel >> 0 ) & 0x1;
unsigned int bootsel1 = (bootsel >> 1 ) & 0x1;
unsigned int bootsel2 = (bootsel >> 2 ) & 0x1;
unsigned int mru_remap = spl_get_mru_reg(MRU_REMAP);
unsigned int mru_reg7 = (spl_get_mru_reg(MRU_REG7) & 0x1);
unsigned int ns_forbid = spl_get_mru_reg(SEC_NS_FORBIT);
printf_spl("SPL: %s secure boot, nsforbid(%u)\n", (ns_forbid == NONE_SECURE_BOOT_FLAG ? "non" : ""), ns_forbid);
printf_spl("SPL: boot from %s, bootmod(%u)\n", (bootmod ? "rom" : "norflash"), bootmod);
spl_get_spinor_doubleboot();
#if BOOT_OS_LITEOS
/*启动方式1 无管理双boot*/
if (ns_forbid == NONE_SECURE_BOOT_FLAG && bootmod == 0 && bootsel0 == 0 && bootsel1 == 0 && bootsel2 == 0) {
printf_spl("SPL: boot %s, mru_remap(%u)\n", (mru_remap ? "back" : "main"), mru_remap);
return (mru_reg7 ? CONFIG_NORDOUBOOT_LITEOS_BACKUP : CONFIG_NORDOUBOOT_LITEOS_MAIN);
}
/*启动方式2, 9, 14*/
if ((ns_forbid == NONE_SECURE_BOOT_FLAG && bootmod == 0 && bootsel0 == 0 && bootsel2 == 0 && bootsel1 == 1) || \
(ns_forbid == NONE_SECURE_BOOT_FLAG && bootsel0 == 0 && bootsel2 == 0 && bootmod == 1) || \
(ns_forbid != NONE_SECURE_BOOT_FLAG && bootsel0 == 0 && bootsel2 == 0 ))
{
printf_spl("SPL: boot area %s, mrureg7(%u)\n", (mru_reg7 ? "back" : "main"), mru_reg7);
return (mru_reg7 ? CONFIG_NORBOOT_LITEOS_BACKUP : CONFIG_NORBOOT_LITEOS_MAIN);
}
#else
/*启动方式7 有管理双boot*/
if (ns_forbid == NONE_SECURE_BOOT_FLAG && bootmod == 0 && bootsel0 == 1 && bootsel1 == 0 && bootsel2 == 1) {
printf_spl("SPL: boot %s, mru_remap(%u)\n", (mru_remap ? "back" : "main"), mru_remap);
return (mru_reg7 ? CONFIG_NORDOUBOOT_UBOOT_BACKUP : CONFIG_NORDOUBOOT_UBOOT_MAIN);
}
/*启动方式13,18*/
if ((ns_forbid == NONE_SECURE_BOOT_FLAG && bootmod == 1 && bootsel0 == 1 && bootsel2 == 1) || \
(ns_forbid != NONE_SECURE_BOOT_FLAG && bootsel0 == 1 && bootsel2 == 1 ))
{
printf_spl("SPL: boot area %s, mrureg7(%u)\n", (mru_reg7 ? "back" : "main"), mru_reg7);
return (mru_reg7 ? CONFIG_NORBOOT_UBOOT_BACKUP : CONFIG_NORBOOT_UBOOT_MAIN);
}
#endif
printf("SPL: not support boot type\n");
return -1;
}
#endif
#define FMC_NAND_BL_INDEX2 2
#define FMC_NOR_WL_INDEX2 2
#define FMC_NOR_WL_INDEX3 3
#define FMC0_SPI_NAND_UBOOT_SIZE 0x800000
#define FMC0_SPI_NOR_LITEOS_SIZE 0x400000
#define FMC1_DOUBLE_NOR_DOUBLE_BOOT_LITEOS_MAIN_BASE 0x0
#define FMC0_SINGLE_NOR_DOUBLE_BOOT_LITEOS_BASE 0x800000
#define FMC0_SINGLE_NOR_SINGLE_BOOT_LITEOS_BASE 0x940000
#define FMC1_SPI_NOR_UBOOT_SIZE 0x400000
uint32_t spl_nand_get_uboot_raw_page(void);
void spl_set_flash_protect(void)
{
unsigned int bootsel = spl_get_bootsel();
unsigned int bootsel0 = (bootsel >> 0 ) & 0x1;
unsigned int bootsel2 = (bootsel >> 2 ) & 0x1;
unsigned int nor_next_boot_base;
#if !BOOT_OS_LITEOS
unsigned int nand_next_boot_base;
#endif
if ((bootsel0 == 0) && (bootsel2 == 1)) { // nand启动
#if !BOOT_OS_LITEOS
nand_next_boot_base = spl_nand_get_uboot_raw_page();
(void)fmc_nand_bl_with_addr_config_addr(0, FMC_NAND_BL_INDEX2, nand_next_boot_base, nand_next_boot_base + FMC0_SPI_NAND_UBOOT_SIZE);
(void)fmc_nand_lock_config(0, 1);
#endif
} else { // nor启动
nor_next_boot_base = spl_nor_get_uboot_base();
#if BOOT_OS_LITEOS
/* code区 */
(void)spi_flash_lock_config(0, 1);
(void)spi_flash_wl_addr_config_addr(0, FMC_NOR_WL_INDEX2, nor_next_boot_base, nor_next_boot_base + FMC0_SPI_NOR_LITEOS_SIZE);
#else
if (nor_next_boot_base > 0x10000000) {
nor_next_boot_base = nor_next_boot_base - 0x10000000;
}
(void)spi_flash_wl_addr_config_addr(1, FMC_NOR_WL_INDEX2, nor_next_boot_base, nor_next_boot_base + FMC1_SPI_NOR_UBOOT_SIZE);
(void)spi_flash_lock_config(1, 1);
#endif
}
}
#if BOOT_OS_LITEOS
void spl_set_flash_liteos_run_protect(void)
{
unsigned int bootsel = spl_get_bootsel();
unsigned int bootsel1 = (bootsel >> 1 ) & 0x1;
unsigned int bootsel3 = (bootsel >> 3 ) & 0x1;
unsigned int bootmod = ((spl_get_mru_reg(MRU_CFG1) & MRU_CFG1_BOOTMOD_MASK ) >> MRU_CFG1_BOOTMOD_SHIFT);
unsigned int ns_forbid = spl_get_mru_reg(SEC_NS_FORBIT);
/* run区 */
if (bootsel3 == 1) { // 双nor
(void)spi_flash_lock_config(1, 1);
(void)spi_flash_wl_addr_config_addr(1, FMC_NOR_WL_INDEX3, FMC1_DOUBLE_NOR_DOUBLE_BOOT_LITEOS_MAIN_BASE, FMC1_DOUBLE_NOR_DOUBLE_BOOT_LITEOS_MAIN_BASE + FMC0_SPI_NOR_LITEOS_SIZE - 1);
(void)spi_flash_xip_addr_protect(1, 0, FMC1_DOUBLE_NOR_DOUBLE_BOOT_LITEOS_MAIN_BASE, FMC1_DOUBLE_NOR_DOUBLE_BOOT_LITEOS_MAIN_BASE + FMC0_SPI_NOR_LITEOS_SIZE - 1);
} else if ((bootsel3 == 0) && (bootsel1 == 0) && (bootmod == 0) && (ns_forbid == NONE_SECURE_BOOT_FLAG)) { //单nor 双boot
(void)spi_flash_wl_addr_config_addr(0, FMC_NOR_WL_INDEX3, FMC0_SINGLE_NOR_DOUBLE_BOOT_LITEOS_BASE, FMC0_SINGLE_NOR_DOUBLE_BOOT_LITEOS_BASE + FMC0_SPI_NOR_LITEOS_SIZE - 1);
(void)spi_flash_xip_addr_protect(0, 0, FMC0_SINGLE_NOR_DOUBLE_BOOT_LITEOS_BASE, FMC0_SINGLE_NOR_DOUBLE_BOOT_LITEOS_BASE + FMC0_SPI_NOR_LITEOS_SIZE - 1);
} else { //单nor 单boot
(void)spi_flash_wl_addr_config_addr(0, FMC_NOR_WL_INDEX3, FMC0_SINGLE_NOR_SINGLE_BOOT_LITEOS_BASE, FMC0_SINGLE_NOR_SINGLE_BOOT_LITEOS_BASE + FMC0_SPI_NOR_LITEOS_SIZE - 1);
(void)spi_flash_xip_addr_protect(0, 0, FMC0_SINGLE_NOR_SINGLE_BOOT_LITEOS_BASE, FMC0_SINGLE_NOR_SINGLE_BOOT_LITEOS_BASE + FMC0_SPI_NOR_LITEOS_SIZE - 1);
}
}
#endif
#ifdef EXEC_ENV_2125_EVB
uint32_t spl_nand_get_uboot_raw_page(void)
{
unsigned int mru_reg7 = (spl_get_mru_reg(MRU_REG7) & 0x1);
printf("SPL: boot from %s, mru_reg7(%u)\n", (mru_reg7 ? "backup" : "main"), mru_reg7);
return (mru_reg7 ? CONFIG_4M_NANDBOOT_UBOOT_BACKUP : CONFIG_4M_NANDBOOT_UBOOT_MAIN);
}
#else
#if !BOOT_OS_LITEOS
uint32_t spl_nand_get_uboot_raw_page(void)
{
unsigned int mru_reg7 = (spl_get_mru_reg(MRU_REG7) & 0x1);
unsigned int bootsel = spl_get_bootsel();
unsigned int bootsel0 = (bootsel >> 0 ) & 0x1;
unsigned int bootsel1 = (bootsel >> 1 ) & 0x1;
unsigned int bootsel2 = (bootsel >> 2 ) & 0x1;
if (bootsel0 == 0 && bootsel2 == 1 && bootsel1 == 0) {
printf_spl("SPL: boot area %s, mrureg7(%u)\n", (mru_reg7 ? "back" : "main"), mru_reg7);
return (mru_reg7 ? CONFIG_2M_NANDBOOT_UBOOT_BACKUP : CONFIG_2M_NANDBOOT_UBOOT_MAIN);
}
if (bootsel0 == 0 && bootsel2 == 1 && bootsel1 == 1) {
printf_spl("SPL: boot area %s, mrureg7(%u)\n", (mru_reg7 ? "back" : "main"), mru_reg7);
return (mru_reg7 ? CONFIG_4M_NANDBOOT_UBOOT_BACKUP : CONFIG_4M_NANDBOOT_UBOOT_MAIN);
}
printf("SPL: not support boot type\n");
return -1;
}
#endif
#endif
#ifdef EXEC_ENV_2125_EVB
u32 spl_boot_device(void)
{
unsigned int bootsel0 = (spl_get_bootsel() & 0x1);
printf("SPL: boot from %s, bootsel0(%u)\n", (bootsel0 ? "nandflash" : "norflash"), bootsel0);
return (bootsel0 ? BOOT_DEVICE_NAND : BOOT_DEVICE_SPI);
}
#else
u32 spl_boot_device(void)
{
unsigned int bootsel = spl_get_bootsel();
unsigned int bootsel0 = (bootsel >> 0 ) & 0x1;
unsigned int bootsel2 = (bootsel >> 2 ) & 0x1;
unsigned int bootsel3 = (bootsel >> 3 ) & 0x1;
printf_spl("SPL: bootsel0(%u),bootsel2(%u), bootsel3(%u)\n", bootsel0 , bootsel2, bootsel3);
if (bootsel0 == 0)
{
printf_spl("SPL: boot from FMC0 %s, bootsel2(%u)\n", (bootsel2 ? "nand" : "spinor") ,bootsel2);
/*当bootsel2 =1 时必为有管理场景;当bootsel2 =0 时必为无管理场景,此时需要通过FMC NOR驱动读写LITEOS到运行地址*/
return (bootsel2 ? BOOT_DEVICE_NAND : BOOT_DEVICE_SPI);
} else {
if(bootsel3 == 1) {
// printf_spl("SPL: boot from FMC1 nor\n");
/*必为有管理场景,SPI通过boot方式拷贝uboot到DDR*/
return (BOOT_DEVICE_NOR);
} else {
printf_spl("SPL: boot from FMC1 but no flash in FMC1\n");
return -1;
}
}
}
#endif
unsigned int spl_spi_get_uboot_offs(struct spi_flash *flash)
{
return spl_nor_get_uboot_base();
}
#if 1
//#ifdef MBIST_EN
#define SECTION_RAM_CODE __attribute__((section(".ram_code")))
#if 0
void SECTION_RAM_CODE mbist_l2_test(void)
{
int cnt = 0x80000;
char *pdest = 0x30080000;
//清空L2数据,检测是否有异常情况发生
while ((cnt)-- > 0) {
*pdest++ = 0;
}
//启动Mbist
//等待硬件mbist完成?软件如何感知
//置位老化结束标志
*(volatile uint64_t *)(MBIST_FINISH_FLAG_ADDR) = MBIST_FINISH_FLAG_VALUE;
//开内狗等待狗超时
*(volatile uint64_t *)(0x3022A000 + 0x0) = 1;
//切换为软件喂外狗
*(volatile uint64_t *)(0x3022D000 + 0x4) = 1;
asm volatile("b .");
}
#endif
static void raw_write_daif(unsigned int daif)
{
__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
}
static void hardware_feed_wdg_switch(int num)
{
//切换回硬件喂狗时,需要先鉴权
writel(0xAA5555AA, (HFD_BASE + HFD_AUTH_OFFSET));
writel(0xAABBCCDD, (HFD_BASE + HFD_AUTH_OFFSET));
//需要设置喂外狗次数为无限次,否则喂6次就会停
writel(num, (HFD_BASE + HFD_NUM_OFFSET));
//此时才能切换回硬件喂狗
writel(0, (HFD_BASE + HFD_SFDEN_OFFSET));
}
static void designware_wdt_disable(uint64_t base)
{
/*由于WDG CR的bit0 无法直接写0,需要特殊流程进行解锁寄存器 (DW_WDT_AUTH为额外设计的寄存器)*/
writel(0x5555aaaa, (base + 0X1C));
writel(0xaaaa5555, (base + 0X1C));
writel(0, (base + 0X00));
}
static unsigned int designware_wdt_is_enabled(uint64_t base)
{
return readl(base + 0x00) & BIT(0);
}
static void hw_watchdog_reset(uint64_t base)
{
if (designware_wdt_is_enabled(base))
/* restart the watchdog counter */
writel(0x76, (0x3022A000 + 0x0C));
}
static void designware_wdt_stop(uint64_t base)
{
hw_watchdog_reset(base);
designware_wdt_disable(base);
}
void mbist_start(void)
{
/*读 RAM 空间是否有老化标志,且老化标志未结束*/
int mbist_enable = readl(MBIST_ENBALE_FLAG_ADDR);
int mbist_finish = readl(MBIST_FINISH_FLAG_ADDR);
if(mbist_enable == MBIST_ENBALE_FLAG_VALUE && mbist_finish != MBIST_FINISH_FLAG_VALUE)
{
printf_spl("SPL: prepare Mbist test\n");
//关闭内狗
designware_wdt_stop(0x3022A000);
//外狗切换为硬件喂狗
hardware_feed_wdg_switch(0);
//关闭中断
raw_write_daif((1<<6 | 1<<7 | 1<<8 | 1<<9));
#if 0
mbist_l2_test();
#else
#if BOOT_OS_LITEOS
memcpy((void *)(uintptr_t)(0x30060000),(void *)(uintptr_t)(0x300A3300+0x3bd00) ,32*1024);
#else
memcpy((void *)(uintptr_t)(0x30060000),(void *)(uintptr_t)(0x300A3300+0x54d00) ,32*1024);
#endif
void ( *entry ) ( void );
/* Jump to the target entry */
entry = ( void ( * ) ( void ) ) 0x30060000;
printf_spl("SPL :Jump to Mbist.\n" );
udelay(10);
entry();
#endif
}
//拷贝MBIST 到FLASH
if(mbist_finish == MBIST_FINISH_FLAG_VALUE)
{
printf_spl("MBIST: test finish, result OK\n");
//清除32K SRAM数据
memset((void *)CONFIG_SYS_INIT_RAM_ADDR, 0, CONFIG_SYS_INIT_RAM_SIZE);
}
}
#endif
void board_init_f(ulong dummy)
{
int ret;
unsigned int bootsel0 = (spl_get_bootsel() & 0x1);
bootsel0 = bootsel0 ? BOOT_DEVICE_NAND : BOOT_DEVICE_NOR;
#ifdef CONFIG_DEBUG_UART
/*
* Debug UART can be used from here if required:
*
* debug_uart_init();
* printch('a');
* printhex8(0x1234);
* printascii("string");
*/
//Repeat Call in crt0_64.S,printf
//debug_uart_init();
#endif
mbist_start();
board_early_init_f();
ret = spl_early_init();
if (ret) {
debug("spl_early_init() failed: %d\n", ret);
hang();
}
timer_init();
preloader_console_init();
arch_cpu_init();
pll_init();
#ifndef EXEC_ENV_2125_EVB
spl_set_flash_protect();
#endif
}
/* Override weak function defined in SPL framework to enable validation
* of main u-boot image before jumping to u-boot image.
*/
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
typedef void __noreturn (*image_entry_noargs_t)(void);
image_entry_noargs_t image_entry =
(image_entry_noargs_t)(spl_image->entry_point);
/* Validation codes */
printf("Jumping to U-Boot at address 0x%lx\n", spl_image->entry_point);
image_entry();
}
static int spl_abortboot(int abort_times, int bootdelay)
{
int abort = 0;
int abort_ascl = 0;
unsigned long ts;
if (abort_times == 0) {
printf("Press 'ctrl+C/c' to stop autoboot: %2d ", bootdelay);
abort_ascl = 0x3;
} else {
printf("Press 'ctrl+D/d' to stop autoboot: %2d ", bootdelay);
abort_ascl = 0x4;
}
/*
* Check if key already pressed
*/
if (tstc()) { /* we got a key press */
if(abort_ascl == getchar()) /* consume input */
{
puts("\b\b\b 0");
abort = 1; /* don't auto boot */
}
}
while ((bootdelay > 0) && (!abort)) {
--bootdelay;
/* delay 1000 ms */
ts = get_timer(0);
do {
if (tstc()) { /* we got a key press */
if(abort_ascl == getchar())
{
abort = 1; /* don't auto boot */
bootdelay = 0; /* no more delay */
break;
}
}
#ifdef PLD_EMU /*PLD环境下延时需要减少*/
udelay(10);
#else
udelay(10000);
#endif
} while (!abort && get_timer(ts) < 1000);
printf("\b\b\b%2d ", bootdelay);
}
putc('\n');
return abort;
}
/* for SPL command line */
void spl_shell_poll(int abort_times)
{
//Generic_Timer_init();
if(spl_abortboot(abort_times, 1))
{
printf("spl enter cli_loop \n");
cli_simple_loop();
}
}
void spl_shell_enter(void)
{
printf("spl enter cli_loop \n");
cli_simple_loop();
}
void spl_board_prepare_for_boot(void)
{
}
这是spl的代码,是厂家提供的代码,没有修改过,原来是nor+nand启动,就能正常初始化ddr的,为什么穷改成单nand启动了,就不行了?