u-boot的执行流程分析start.s

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.globl指示告诉汇编器，_start这个符号要被链接器用到

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.globl _start

_start: b       reset
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq


_undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
_data_abort: .word data_abort
_not_used: .word not_used
_irq: .word irq
_fiq: .word fiq


.balignl 16,0xdeadbeef




/*
 *************************************************************************
 *
 * Startup Code (reset vector)
 *
 * do important init only if we don't start from memory!
 * relocate armboot to ram
 * setup stack
 * jump to second stage
 *
 *************************************************************************
 */


_TEXT_BASE:
.word TEXT_BASE


.globl _armboot_start
_armboot_start:
.word _start


/*
 * These are defined in the board-specific linker script.
 */
.globl _bss_start
_bss_start:
.word __bss_start


.globl _bss_end
_bss_end:
.word _end


#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
.globl IRQ_STACK_START
IRQ_STACK_START:
.word 0x0badc0de


/* IRQ stack memory (calculated at run-time) */
.globl FIQ_STACK_START
FIQ_STACK_START:
.word 0x0badc0de
#endif




/*
 * the actual reset code
 */


reset:
/*
* set the cpu to SVC32 mode

          cpsr 程序状态寄存器

         功能是将cpu切换至超级模式

*/


mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0


/* turn off the watchdog */
#if defined(CONFIG_S3C2400)
# define pWTCON 0x15300000
# define INTMSK 0x14400008 /* Interupt-Controller base addresses */
# define CLKDIVN 0x14800014 /* clock divisor register */
#elif defined(CONFIG_S3C2410)
# define pWTCON 0x53000000      /*watchdog timer special registers address*/
# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
# define INTSUBMSK 0x4A00001C
# define CLKDIVN 0x4C000014 /* clock divisor register */
#endif


#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
ldr     r0, =pWTCON
mov     r1, #0x0
str     r1, [r0]


/*
* mask all IRQs by setting all bits in the INTMR - default
*/
mov r1, #0xffffffff
ldr r0, =INTMSK
str r1, [r0]
# if defined(CONFIG_S3C2410)
ldr r1, =0x3ff
ldr r0, =INTSUBMSK
str r1, [r0]
# endif
/*FLCK  内核时钟，主频；
  HCLK  为AHB总线上的外设提供时钟信号，包括USB时钟。AHB总线用于连接高速外设
  PCLK  为APB总线上的外设提供时钟信号，即IO接口时钟，串口的时钟设置就是从PLCK
        来的，APB总线用于连接低速外设*/
/*通过设置CLKDIVN控制寄存器的HDIVN位(第1位)和PDIVN位(第0位)来改变FCLK, HLCK 和 PCLK的比率*/
/*0 0  F:H:P  1：1：1
  0 1  F:H:P  1：1：2
  1 0  F:H:P  1：2：2
  1 1  F:H:P  1：2：4*/
/* FCLK:HCLK:PCLK = 1:2:4 */
/* default FCLK is 120 MHz ! */
ldr r0, =CLKDIVN
mov r1, #3
str r1, [r0]
#endif /* CONFIG_S3C2400 || CONFIG_S3C2410 */


/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT   /*判断程序是否以调试方式运行*/
bl cpu_init_crit    /*跳转到249行执行cpu_init_crit函数会关闭MMU和数据Cache，调用lowlevel_init，初始化Sdram*/
#endif


#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate: /* relocate U-Boot to RAM    */
adr r0, _start /* r0 <- current position000 of code   */
ldr r1, _TEXT_BASE /* test if we run from flash3800 or RAM */
cmp     r0, r1                  /* don't reloc during debug         */
beq     stack_setup


ldr r2, _armboot_start /*_armboot_start: .word _start*/
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot            */
add r2, r0, r2 /* r2 <- source end address         */

/*将NOR_FLASH中的代码复制到SDRAM中*/
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0]    */
stmia r1!, {r3-r10} /* copy to   target address [r1]    */
cmp r0, r2 /* until source end addreee [r2]    */
ble copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */

/* Set up the stack

*/

stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot   */
sub r0, r0, #CFG_MALLOC_LEN /* malloc area                      */
sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo                        */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack    */


clear_bss:
ldr r0, _bss_start /* find start of bss segment        */
ldr r1, _bss_end /* stop here                        */
mov r2, #0x00000000 /* clear                            */


clbss_l:str r2, [r0] /* clear loop...                    */
add r0, r0, #4
cmp r0, r1
ble clbss_l


#if 0
/* try doing this stuff after the relocation */
ldr     r0, =pWTCON
mov     r1, #0x0
str     r1, [r0]


/*
* mask all IRQs by setting all bits in the INTMR - default
*/
mov r1, #0xffffffff
ldr r0, =INTMR
str r1, [r0]


/* FCLK:HCLK:PCLK = 1:2:4 */
/* default FCLK is 120 MHz ! */
ldr r0, =CLKDIVN
mov r1, #3
str r1, [r0]
/* END stuff after relocation */
#endif


ldr pc, _start_armboot


_start_armboot: .word start_armboot


//程序运行到这里，就会跳到第二功能部分执行，执行代码为c语言代码。

/*
 *************************************************************************
 *
 * CPU_init_critical registers
 *
 * setup important registers
 * setup memory timing
 *
 *************************************************************************
 */




#ifndef CONFIG_SKIP_LOWLEVEL_INIT
cpu_init_crit:
/*
* flush v4 I/D caches使数据cache与指令cache无效
*/
/*MCR{<cond>} <p>，< opcode_1>，<Rd>,<CRn>,<CRm>{,<opcode_2>}
<cond>为指令执行的条件码。当<cond>忽略时指令为无条件执行。
         < opcode_1>为协处理器将执行的操作的操作码。对于CP15协处理器来说，< opcode_1>永远为0b000，当< opcode_1>不为0b000时，该指令操作结果不可预知。
         <Rd>作为源寄存器的ARM寄存器，其值将被传送到协处理器寄存器中。
         <CRn>作为目标寄存器的协处理器寄存器，其编号可能是C0，C1，…，C15。
         <CRm>和<opcode_2>两者组合决定对协处理器寄存器进行所需要的操作，如果没有指定，则将为<CRm>为C0，opcode_2为0
*/
mov r0, #0
mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */


/*
* disable MMU stuff and caches
BIC{<cond>}{S} <Rd>,<Rn>,<shifter_operand> 
将寄存器Rn的值与第2个源操作数shifter_operand的值的反码按位做“逻辑与”操作，结果保存到Rd中。  　　
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0


/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
* find a lowlevel_init.S in your board directory.
*/
mov ip, lr
bl lowlevel_init
mov lr, ip
mov pc, lr
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */


/*
 *************************************************************************
 *
 * Interrupt handling
 *
 *************************************************************************
 */


@
@ IRQ stack frame.
@
#define S_FRAME_SIZE 72


#define S_OLD_R0 68
#define S_PSR 64
#define S_PC 60
#define S_LR 56
#define S_SP 52


#define S_IP 48
#define S_FP 44
#define S_R10 40
#define S_R9 36
#define S_R8 32
#define S_R7 28
#define S_R6 24
#define S_R5 20
#define S_R4 16
#define S_R3 12
#define S_R2 8
#define S_R1 4
#define S_R0 0


#define MODE_SVC 0x13
#define I_BIT 0x80


/*
 * use bad_save_user_regs for abort/prefetch/undef/swi ...
 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
 */


.macro bad_save_user_regs
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Calling r0-r12
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
sub r2, r2, #(CFG_GBL_DATA_SIZE+8)  @ set base 2 words into abort stack
ldmia r2, {r2 - r3} @ get pc, cpsr
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC


add r5, sp, #S_SP
mov r1, lr
stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
mov r0, sp
.endm


.macro irq_save_user_regs
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Calling r0-r12
add     r8, sp, #S_PC
stmdb   r8, {sp, lr}^                   @ Calling SP, LR
str     lr, [r8, #0]                    @ Save calling PC
mrs     r6, spsr
str     r6, [r8, #4]                    @ Save CPSR
str     r0, [r8, #8]                    @ Save OLD_R0
mov r0, sp
.endm


.macro irq_restore_user_regs
ldmia sp, {r0 - lr}^ @ Calling r0 - lr
mov r0, r0
ldr lr, [sp, #S_PC] @ Get PC
add sp, sp, #S_FRAME_SIZE
subs pc, lr, #4 @ return & move spsr_svc into cpsr
.endm


.macro get_bad_stack
ldr r13, _armboot_start @ setup our mode stack
sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack


str lr, [r13] @ save caller lr / spsr
mrs lr, spsr
str     lr, [r13, #4]


mov r13, #MODE_SVC @ prepare SVC-Mode
@ msr spsr_c, r13
msr spsr, r13
mov lr, pc
movs pc, lr
.endm


.macro get_irq_stack @ setup IRQ stack
ldr sp, IRQ_STACK_START
.endm


.macro get_fiq_stack @ setup FIQ stack
ldr sp, FIQ_STACK_START
.endm


/*
 * exception handlers
 */
.align  5
undefined_instruction:
get_bad_stack
bad_save_user_regs
bl do_undefined_instruction


.align 5
software_interrupt:
get_bad_stack
bad_save_user_regs
bl do_software_interrupt


.align 5
prefetch_abort:
get_bad_stack
bad_save_user_regs
bl do_prefetch_abort


.align 5
data_abort:
get_bad_stack
bad_save_user_regs
bl do_data_abort


.align 5
not_used:
get_bad_stack
bad_save_user_regs
bl do_not_used


#ifdef CONFIG_USE_IRQ


.align 5
irq:
get_irq_stack
irq_save_user_regs
bl do_irq
irq_restore_user_regs


.align 5
fiq:
get_fiq_stack
/* someone ought to write a more effiction fiq_save_user_regs */
irq_save_user_regs
bl do_fiq
irq_restore_user_regs


#else


.align 5
irq:
get_bad_stack
bad_save_user_regs
bl do_irq


.align 5
fiq:
get_bad_stack
bad_save_user_regs
bl do_fiq

#endif

总结：由u-boot.lds中的ENTRY指定程序入口为start.s文件中的_start。因此程序在刚开始执行时，先执行start.s文件的代码其执行流程顺序执行遇到跳转则跳转，第一条指令即遇到跳转指令b，跳转到reset执行，

功能实现：1通过msr和mrs指令通过设置那cpsr寄存器的值，将cpu切换到超级模式，

                    2通过WTCON寄存器地址进行赋值，关看门狗，其寄存器的地址可以参看芯片手册，屏蔽中断，设定FCLK，HCLK，PCLK的比例

                    3跳转到cpu_init_start功能关闭MMU关闭cache，调用lowervel_init.s文件初始化SDRAM

                    4将NOR_FLASH中的代码复制到SDRAM中其复制的位置由TEXT_BASE决定。

            5设定栈，并且初始化栈（初始化即往栈中放0）

                    6跳转到borad.c中的start_armboot中，执行第二步。