S3C2440 NOR FLASH最小启动代码（基于keil汇编器）

最新推荐文章于 2018-12-23 12:17:19 发布

原创最新推荐文章于 2018-12-23 12:17:19 发布 · 789 阅读

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#汇编 #flash #c #timer #import #generation

; Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs

Mode_USR EQU 0x10

;----------------------- Stack and Heap Definitions ----------------------------

;// <h> Stack Configuration (Stack Sizes in Bytes)
;//   <o0> Undefined Mode      <0x0-0xFFFFFFFF:8>
;//   <o1> Supervisor Mode     <0x0-0xFFFFFFFF:8>
;//   <o2> Abort Mode          <0x0-0xFFFFFFFF:8>
;//   <o3> Fast Interrupt Mode <0x0-0xFFFFFFFF:8>
;//   <o4> Interrupt Mode      <0x0-0xFFFFFFFF:8>
;//   <o5> User/System Mode    <0x0-0xFFFFFFFF:8>
;// </h>

UND_Stack_Size EQU     0x00000000
SVC_Stack_Size EQU     0x00000008
ABT_Stack_Size EQU     0x00000000
FIQ_Stack_Size EQU     0x00000000
IRQ_Stack_Size EQU     0x00000080
USR_Stack_Size EQU     0x00000400

ISR_Stack_Size EQU (UND_Stack_Size + SVC_Stack_Size + ABT_Stack_Size + \
FIQ_Stack_Size + IRQ_Stack_Size)

AREA STACK, NOINIT, READWRITE, ALIGN=3

Stack_Mem SPACE USR_Stack_Size
__initial_sp SPACE ISR_Stack_Size
Stack_Top

;// <h> Heap Configuration
;// <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF>
;// </h>

Heap_Size EQU 0x00000000

AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit

;----------------------- Watchdog Timer Definitions ----------------------------

WT_BASE         EQU     0x53000000      ; Watchdog Timer Base Address
WTCON_OFS       EQU     0x00            ; Watchdog Timer Control Register Offset
WTDAT_OFS       EQU     0x04            ; Watchdog Timer Data Register    Offset
WTCNT_OFS       EQU     0x08            ; Watchdog Timer Count Register   Offset

;// <e> Watchdog Timer Setup
;//   <h> Watchdog Timer Control Register (WTCON)
;//     <o1.8..15> Prescaler Value <0-255>
;//     <o1.5>      Watchdog Timer Enable
;//     <o1.3..4>   Clock Division Factor
;//       <0=> 16   <1=> 32 <2=> 64 <3=> 128
;//     <o1.2>      Interrupt Generation Enable
;//     <o1.0>      Reset Enable
;//   </h>
;//   <h> Watchdog Timer Data Register (WTDAT)
;//     <o2.0..15> Count Reload Value <0-65535>
;//   </h>
;// </e> Watchdog Timer Setup
WT_SETUP        EQU     1
WTCON_Val       EQU     0x00000000
WTDAT_Val       EQU     0x00008000

;----------------------- CODE --------------------------------------------------

PRESERVE8

; Area Definition and Entry Point
; Startup Code must be linked first at Address at which it expects to run.

AREA RESET, CODE, READONLY
ARM

                IF      :LNOT::DEF:__EVAL
                IMPORT ||Image$$ER_ROM1$$RO$$Length||
                IMPORT ||Image$$RW_RAM1$$RW$$Length||
                ENDIF

; Exception Vectors
; Mapped to Address 0.
; Absolute addressing mode must be used.
; Dummy Handlers are implemented as infinite loops which can be modified.

; Watchdog Setup ---------------------------------------------------------------

Reset_Handler
                LDR     R0, =WT_BASE
                LDR     R1, =WTCON_Val
                LDR     R2, =WTDAT_Val
                STR     R2, [R0, #WTCNT_OFS]
                STR     R2, [R0, #WTDAT_OFS]
                STR     R1, [R0, #WTCON_OFS]
; Setup Stack for each mode ----------------------------------------------------

LDR R0, =Stack_Top

; Enter User Mode and set its Stack Pointer
MSR CPSR_c, #Mode_USR

MOV SP, R0
SUB SL, SP, #USR_Stack_Size

; Enter the C code -------------------------------------------------------------

                IMPORT __main
                LDR     R0, =__main
                BX      R0

; User Initial Stack & Heap
AREA |.text|, CODE, READONLY

IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap

__user_initial_stackheap
                LDR     R0, = Heap_Mem
                LDR     R1, =(Stack_Mem + USR_Stack_Size)
                LDR     R2, = (Heap_Mem +      Heap_Size)
                LDR     R3, = Stack_Mem
                BX      LR
                END