需要了解的Smbios知识

本文深入探讨SMBIOS(system management BIOS)与DMI(Desktop Management Interface)的概念,介绍两者如何在计算机硬件信息管理中发挥作用。SMBIOS为硬件信息提供标准化格式,而DMI则收集并管理这些信息,两者共同确保系统硬件配置的准确性和完整性。

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什么是Smbios

 Smbios(system management bios)是主板或者系统制造厂商以标准格式显示产品信息所遵循的统一规范,Smbios规范标准定义了收集的电脑信息都包含哪方面的信息?其实就是包含很多c语言中的结构体,每一个结构体代表一种信息。
 每个主板厂商或者OEM厂商所生产的带脑,在出厂的时候都会按照smbios标准信息写入到bios中。主要就是包含可电脑各个模块信息。厂商将这些信息写好存入到BIOS芯片中,这部分信息是如何存入的,当然毫无疑问肯定是以bios代码的形式实现的,最终将代码的二进制写入到开机启动的flash芯片中。这部分代码是属于BIOS的一部分。在uefi中属于专门的一个驱动模块。

什么是DMI

 DMI(Desktop Management Interface)也就是桌面管理接口,它包含有关于系统硬件的配置信息,DMI的主要组成部分是Management Interface Format(MIF)数据库,这个数据库包括可所有有关电脑系统和配置信息。通过DMI,用户可以获取序列号,电脑厂商,串口信息以及其他系统配件信息。计算机每次启动时都对DMI数据进行校验,如果该数据出错或硬件有所变动,就会对机器进行检测,并把测试的数据写入到BIOS芯片保存。DMI收集信息,也是按照Smbios标准所进行的。因此DMI的实现,就是按照Smbios标准所实现的。

Smbios的访问方式

 对于符合Smbios规范的计算机,可以通过访问Smbios的结构获得系统信息,共有两种办法可以访问Smbios数据结构。
 1.通过即插即用功能接口访问Smbios接口,这个在Smbios2.0标准里定义了,从Smbio2.1开始这个访问方法就不在推荐使用。
 2:基于表结构的方法,表内容是table entry point的数据,这个访问方法从smbios2.1以后开始被使用,从2.1开始,以后的版本都推荐使用这种访问方式。在2.1版本中允许支持这两种方法中的任意一种和两种支持,但是2.2以后的版本,必须支持方法2.
 目前主流的访问方式都是基于表结构的访问方式。==基于表结构的访问Smbios的过程是先找到Entry Point Structure(EPS)表,然后通过Entry Point Structure(EPS)表的数据找到Smbios结构表。
 对于非EFI系统,访问Smbios EPS表的操作过程如下:
 1.从物理内存0x000F0000-0x000FFFFF之间寻找关键字“SM
 2.找到后再向后16个字节,看后面2个byte是否是关键字“DMI",如果是,EPS表即找到。
 满足上面两个条件,即可认为找到了Smbios的enttry Point Structure,然后程序解析这个结构中的数据获取其他的信息。

System Management BIOS (SMBIOS) Reference 6 Specification 7 Supersedes: 3.1.1 8 Document Class: Normative 9 Document Status: Published 10 Document Language: en-US 11System Management BIOS (SMBIOS) Reference Specification DSP0134 2 Published Version 3.2.0 12 Copyright Notice 13 Copyright © 2000, 2002, 2004–2016 Distributed Management Task Force, Inc. (DMTF). All rights 14 reserved. 15 DMTF is a not-for-profit association of industry members dedicated to promoting enterprise and systems 16 management and interoperability. Members and non-members may reproduce DMTF specifications and 17 documents, provided that correct attribution is given. As DMTF specifications may be revised from time to 18 time, the particular version and release date should always be noted. 19 Implementation of certain elements of this standard or proposed standard may be subject to third party 20 patent rights, including provisional patent rights (herein "patent rights"). DMTF makes no representations 21 to users of the standard as to the existence of such rights, and is not responsible to recognize, disclose, 22 or identify any or all such third party patent right, owners or claimants, nor for any incomplete or 23 inaccurate identification or disclosure of such rights, owners or claimants. DMTF shall have no liability to 24 any party, in any manner or circumstance, under any legal theory whatsoever, for failure to recognize, 25 disclose, or identify any such third party patent rights, or for such party’s reliance on the standard or 26 incorporation thereof in its product, protocols or testing procedures. DMTF shall have no liability to any 27 party implementing such standard, whether such implementation is foreseeable or not, nor to any patent 28 owner or claimant, and shall have no liability or responsibility for costs or losses incurred if a standard is 29 withdrawn or modified after publication, and shall be indemnified and held harmless by any party 30 implementing the standard from any and all claims of infringement by a patent owner for such 31 implementations. 32 For information about patents held by third-parties which have notified the DMTF that, in their opinion, 33 such patent may relate to or impact implementations of DMTF standards, visit 34 http://www.dmtf.org/about/policies/disclosures.php. 35 This document’s normative language is English. Translation into other languages is permitted.DSP0134 System Management BIOS (SMBIOS) Reference Specification Version 3.2.0 Published 3 36 CONTENTS 37 Foreword ....................................................................................................................................................... 9 38 Introduction.................................................................................................................................................. 10 39 Document conventions........................................................................................................................ 10 40 Typographical conventions ....................................................................................................... 10 41 Document version number conventions ................................................................................... 10 42 1 Scope .................................................................................................................................................. 13 43 1.1 Supported processor architectures........................................................................................... 13 44 2 Normative references .......................................................................................................................... 13 45 3 Terms and definitions .......................................................................................................................... 15 46 4 Symbols and abbreviated terms.......................................................................................................... 15 47 5 Accessing SMBIOS information .......................................................................................................... 21 48 5.1 General ..................................................................................................................................... 21 49 5.2 Table convention....................................................................................................................... 21 50 5.2.1 SMBIOS 2.1 (32-bit) Entry Point.................................................................................. 22 51 5.2.2 SMBIOS 3.0 (64-bit) Entry Point.................................................................................. 23 52 6 SMBIOS structures.............................................................................................................................. 24 53 6.1 Structure standards................................................................................................................... 24 54 6.1.1 Structure evolution and usage guidelines.................................................................... 25 55 6.1.2 Structure header format............................................................................................... 26 56 6.1.3 Text strings .................................................................................................................. 26 57 6.2 Required structures and data ................................................................................................... 27 58 6.3 SMBIOS fields and CIM MOF properties.................................................................................. 28 59 7 Structure definitions............................................................................................................................. 29 60 7.1 BIOS Information (Type 0)........................................................................................................ 29 61 7.1.1 BIOS Characteristics.................................................................................................... 31 62 7.1.2 BIOS Characteristics Extension Bytes......................................................................... 32 63 7.2 System Information (Type 1) .................................................................................................... 33 64 7.2.1 System — UUID........................................................................................................... 34 65 7.2.2 System — Wake-up Type............................................................................................ 35 66 7.3 Baseboard (or Module) Information (Type 2) ........................................................................... 35 67 7.3.1 Baseboard — feature flags .......................................................................................... 36 68 7.3.2 Baseboard — Board Type ........................................................................................... 37 69 7.4 System Enclosure or Chassis (Type 3) .................................................................................... 37 70 7.4.1 System Enclosure or Chassis Types........................................................................... 39 71 7.4.2 System Enclosure or Chassis States........................................................................... 40 72 7.4.3 System Enclosure or Chassis Security Status ............................................................ 41 73 7.4.4 System Enclosure or Chassis — Contained Elements................................................ 41 74 7.5 Processor Information (Type 4) ................................................................................................ 42 75 7.5.1 Processor Information — Processor Type................................................................... 45 76 7.5.2 Processor Information — Processor Family ................................................................ 46 77 7.5.3 Processor ID field format ............................................................................................. 52 78 7.5.4 Processor Information — Voltage................................................................................ 52 79 7.5.5 Processor Information — Processor Upgrade............................................................. 53 80 7.5.6 Processor Information — Core Count.......................................................................... 55 81 7.5.7 Processor Information — Core Enabled...................................................................... 55 82 7.5.8 Processor Information — Thread Count...................................................................... 56 83 7.5.9 Processor Characteristics............................................................................................ 56 84 7.6 Memory Controller Information (Type 5, Obsolete) .................................................................. 57 85 7.6.1 Memory Controller Error Detecting Method................................................................. 58 86 7.6.2 Memory Controller Error Correcting Capability............................................................ 58 87 7.6.3 Memory Controller Information — Interleave Support................................................. 58System Management BIOS (SMBIOS) Reference Specification DSP0134 4 Published Version 3.2.0 88 7.6.4 Memory Controller Information — Memory Speeds .................................................... 59 89 7.7 Memory Module Information (Type 6, Obsolete) ...................................................................... 59 90 7.7.1 Memory Module Information — Memory Types .......................................................... 60 91 7.7.2 Memory Module Information — Memory Size ............................................................. 60 92 7.7.3 Memory subsystem example ....................................................................................... 61 93 7.8 Cache Information (Type 7) ...................................................................................................... 63 94 7.8.1 Cache Information — Maximum Cache Size and Installed Size ................................. 65 95 7.8.2 Cache Information — SRAM Type .............................................................................. 65 96 7.8.3 Cache Information — Error Correction Type ............................................................... 66 97 7.8.4 Cache Information — System Cache Type ................................................................. 66 98 7.8.5 Cache Information — Associativity.............................................................................. 66 99 7.9 Port Connector Information (Type 8) ........................................................................................ 67 100 7.9.1 Port Information example............................................................................................. 68 101 7.9.2 Port Information — Connector Types .......................................................................... 68 102 7.9.3 Port Types.................................................................................................................... 69 103 7.10 System Slots (Type 9)............................................................................................................... 70 104 7.10.1 System Slots — Slot Type ........................................................................................... 71 105 7.10.2 System Slots — Slot Data Bus Width.......................................................................... 73 106 7.10.3 System Slots — Current Usage................................................................................... 74 107 7.10.4 System Slots — Slot Length ........................................................................................ 74 108 7.10.5 System Slots — Slot ID ............................................................................................... 74 109 7.10.6 Slot Characteristics 1................................................................................................... 75 110 7.10.7 Slot Characteristics 2................................................................................................... 75 111 7.10.8 Segment Group Number, Bus Number, Device/Func
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