Verilog学习 | 用initial语句写出固定的波形

initial begin
	ia = 0;
	ib = 1;
	clk = 0;
	#10
    ia = 1;	
	#20
    ib = 0;
	#20
    ia = 0;
end

always #5 clk = ~clk;

或者

initial clk = 0;

initial begin
	ia = 0;
	#10
    ia = 1;	
	#40
    ia = 0;
end

initial begin
	ib = 1;
	#30 
    ib = 0;
end

always #5 clk = ~clk;

看出两个的区别了吗？欢迎讨论！