CLREX

最新推荐文章于 2024-10-01 22:41:41 发布
最新推荐文章于 2024-10-01 22:41:41 发布
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文章标签： 嵌入式 c/c++ 
 	KernelBase.dll!RaiseException()	Unknown
>	coreclr.dll!`RaiseTheExceptionInternalOnly'::`81'::__Body::Run(RaiseTheExceptionInternalOnly::__l2::Param * pParam) Line 3114	C++
 	coreclr.dll!RaiseTheExceptionInternalOnly(OBJECTREF throwable, int rethrow, int fForStackOverflow) Line 3114	C++
 	coreclr.dll!UnwindAndContinueRethrowHelperAfterCatch(Frame * pEntryFrame, Exception * pException) Line 8743	C++
 	coreclr.dll!CEEInfo::resolveToken(CORINFO_RESOLVED_TOKEN * pResolvedToken) Line 1301	C++
 	clrjit.dll!Compiler::impResolveToken(const unsigned char * addr, CORINFO_RESOLVED_TOKEN * pResolvedToken, CorInfoTokenKind kind) Line 270	C++
 	clrjit.dll!Compiler::impImportBlockCode(BasicBlock * block) Line 11875	C++
 	clrjit.dll!`Compiler::impImportBlock'::`15'::__Body::Run(Compiler::impImportBlock::__l2::FilterVerificationExceptionsParam * pParam) Line 14715	C++
 	clrjit.dll!Compiler::impImportBlock(BasicBlock * block) Line 14720	C++
 	clrjit.dll!Compiler::impImport(BasicBlock * method) Line 15793	C++
 	clrjit.dll!Compiler::fgImport() Line 6670	C++
 	clrjit.dll!Compiler::compCompile(void * * methodCodePtr, unsigned long * methodCodeSize, CORJIT_FLAGS * compileFlags) Line 4002	C++
 	clrjit.dll!Compiler::compCompileHelper(CORINFO_MODULE_STRUCT_ * classPtr, ICorJitInfo * compHnd, CORINFO_METHOD_INFO * methodInfo, void * * methodCodePtr, unsigned long * methodCodeSize, CORJIT_FLAGS * compileFlags, CorInfoInstantiationVerification instVerInfo) Line 5429	C++
 	clrjit.dll!`Compiler::compCompile'::`38'::__Body::Run(Compiler::compCompile::__l2::__JITParam * __JITpParam) Line 4817	C++
 	clrjit.dll!Compiler::compCompile(CORINFO_METHOD_STRUCT_ * methodHnd, CORINFO_MODULE_STRUCT_ * classPtr, ICorJitInfo * compHnd, CORINFO_METHOD_INFO * methodInfo, void * * methodCodePtr, unsigned long * methodCodeSize, CORJIT_FLAGS * compileFlags) Line 4825	C++
 	clrjit.dll!``jitNativeCode'::`11'::__Body::Run'::`6'::__Body::Run(jitNativeCode::__l11::__Body::Run::__l5::__JITParam * __JITpParam) Line 6035	C++
 	clrjit.dll!`jitNativeCode'::`11'::__Body::Run(jitNativeCode::__l2::__JITParam * __JITpParam) Line 6066	C++
 	clrjit.dll!jitNativeCode(CORINFO_METHOD_STRUCT_ * methodHnd, CORINFO_MODULE_STRUCT_ * classPtr, ICorJitInfo * compHnd, CORINFO_METHOD_INFO * methodInfo, void * * methodCodePtr, unsigned long * methodCodeSize, CORJIT_FLAGS * compileFlags, void * inlineInfoPtr) Line 6066	C++
 	clrjit.dll!CILJit::compileMethod(ICorJitInfo * compHnd, CORINFO_METHOD_INFO * methodInfo, unsigned int flags, unsigned char * * entryAddress, unsigned long * nativeSizeOfCode) Line 319	C++
 	coreclr.dll!invokeCompileMethodHelper(EEJitManager * jitMgr, CEEInfo * comp, CORINFO_METHOD_INFO * info, unsigned int flags, unsigned int flags2, unsigned char * * nativeEntry, unsigned long * nativeSizeOfCode) Line 11774	C++
 	coreclr.dll!invokeCompileMethod(EEJitManager * jitMgr, CEEInfo * comp, CORINFO_METHOD_INFO * info, unsigned int flags, unsigned int flags2, unsigned char * * nativeEntry, unsigned long * nativeSizeOfCode) Line 11829	C++
 	coreclr.dll!`CallCompileMethodWithSEHWrapper'::`10'::__Body::Run(CallCompileMethodWithSEHWrapper::__l2::Param * pParam) Line 11891	C++
 	coreclr.dll!CallCompileMethodWithSEHWrapper(EEJitManager * jitMgr, CEEInfo * comp, CORINFO_METHOD_INFO * info, unsigned int flags, unsigned int flags2, unsigned char * * nativeEntry, unsigned long * nativeSizeOfCode, MethodDesc * ftn) Line 11899	C++
 	coreclr.dll!UnsafeJitFunction(MethodDesc * ftn, COR_ILMETHOD_DECODER * ILHeader, unsigned long flags, unsigned long flags2, unsigned long * pSizeOfCode) Line 12575	C++
 	coreclr.dll!MethodDesc::MakeJitWorker(COR_ILMETHOD_DECODER * ILHeader, unsigned long flags, unsigned long flags2) Line 462	C++
 	coreclr.dll!MethodDesc::DoPrestub(MethodTable * pDispatchingMT) Line 1454	C++
 	coreclr.dll!PreStubWorker(TransitionBlock * pTransitionBlock, MethodDesc * pMD) Line 1041	C++
 	coreclr.dll!ThePreStub() Line 22	Unknown
 	coreclr.dll!CallDescrWorkerInternal() Line 101	Unknown
 	coreclr.dll!CallDescrWorkerWithHandler(CallDescrData * pCallDescrData, int fCriticalCall) Line 90	C++
 	coreclr.dll!MethodDescCallSite::CallTargetWorker(const unsigned __int64 * pArguments) Line 635	C++
 	coreclr.dll!MethodDescCallSite::Call(const unsigned __int64 * pArguments) Line 420	C++
 	coreclr.dll!``RunMain'::`30'::__Body::Run'::`5'::__Body::Run(RunMain::__l2::Param * pParam) Line 2639	C++
 	coreclr.dll!`RunMain'::`30'::__Body::Run(RunMain::__l2::Param * __EXparam) Line 2655	C++
 	coreclr.dll!RunMain(MethodDesc * pFD, short numSkipArgs, int * piRetVal, REF<PtrArray> * stringArgs) Line 2655	C++
 	coreclr.dll!Assembly::ExecuteMainMethod(REF<PtrArray> * stringArgs, int waitForOtherThreads) Line 2762	C++
 	coreclr.dll!CorHost2::ExecuteAssembly(unsigned long dwAppDomainId, const wchar_t * pwzAssemblyPath, int argc, const wchar_t * * argv, unsigned long * pReturnValue) Line 1349	C++
 	CoreRun.exe!TryRun(const int argc, const wchar_t * * argv, Logger & log, const bool verbose, const bool waitForDebugger, unsigned long & exitCode) Line 572	C++
 	CoreRun.exe!wmain(const int argc, const wchar_t * * argv) Line 685	C++
 	[External Code]

 

Armv9 Cortex-A720的L1 memory system 和 L1 Cache
baron-周贺贺-代码改变世界ctw
09-27 730
本节课我们将讲述Armv9 Cortex-A720的L1 System memory.
ARMv8-A64指令集总结和学习
baron-周贺贺-代码改变世界ctw
10-09 1万+
1、跳转指令 指令统计 条件跳转指令 : 5个 无条件跳转label指令 : 2个 无条件跳转register指令 ： 3个 (1)、条件跳转指令 (偏移范围为±1MiB) b.cond label cbz Xn|Wn, label cbnz Xn|Wn, label tbz Xn|Wn, #uimm6, label //如果Xn的第uimm的bit位位0，则跳转到label tbnz Xn|Wn, #uimm6, label (b.cond的condition条件) (b.cond的应用)
clrex的作用
wmzjzwlzs的专栏
10-25 445
如图:
linux内核起什么作用,arm架构的linux内核中，clrex指令的作用是什么
weixin_30131105的博客
05-11 232
1. clrex指令的作用：《arm architecture reference manual》B2-1292以下简称arm arm手册本文引用地址：http://www.eepw.com.cn/article/201611/317220.htmThe ClearExclusiveLocal() procedure takes as arguments the processor identif...
linux内核 header.s,arm架构的linux内核中，clrex指令的作用是什么
weixin_26812607的博客
05-02 306
1. clrex指令的作用：《arm architecture reference manual》B2-1292以下简称arm arm手册The ClearExclusiveLocal() procedure takes as arguments the processor identifier processorid . The procedure clearsthe local record...
【解答】arm架构的linux内核中，clrex指令的作用是什么，内核中什么时候才会用到？
Heron——Linux & ARM
01-24 5422
先看clrex指令的作用：《arm architecture reference manual》B2-1292以下简称arm arm手册 The ClearExclusiveLocal() procedure takes as arguments the processor identifier processorid . The procedure clears the local rec
系统丢失KernelBase.dll文件出现错误提示的解决办法
amio555的专栏
09-26 2313
其实很多用户玩单机游戏或者安装软件的时候就出现过这种问题，如果是新手第一时间会认为是软件或游戏出错了，其实并不是这样，其主要原因就是你电脑系统的该dll文件丢失了或没有安装一些系统软件平台所需要的动态链接库，这时你可以下载这个KernelBase.dll文件(挑选合适的版本文件)把它放入到程序或系统目录中，当我们执行某一个.exe程序时，相应的DLL文件就会被调用，因此将缺失的文件放回到原目录之后就能打开你的软件或游戏了.那么出现KernelBase.dll丢失要怎么解决？
/**************************************************************************//** * @file core_cm3.c * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File * @version V1.30 * @date 30. October 2009 * * @note * Copyright (C) 2009 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include <stdint.h> /* define compiler specific symbols */ #if defined ( __CC_ARM ) #define __ASM __asm /*!< asm keyword for ARM Compiler */ #define __INLINE __inline /*!< inline keyword for ARM Compiler */ #elif defined ( __ICCARM__ ) #define __ASM __asm /*!< asm keyword for IAR Compiler */ #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ #elif defined ( __GNUC__ ) #define __ASM __asm /*!< asm keyword for GNU Compiler */ #define __INLINE inline /*!< inline keyword for GNU Compiler */ #elif defined ( __TASKING__ ) #define __ASM __asm /*!< asm keyword for TASKING Compiler */ #define __INLINE inline /*!< inline keyword for TASKING Compiler */ #endif /* ################### Compiler specific Intrinsics ########################### */ #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ /* ARM armcc specific functions */ /** * @brief Return the Process Stack Pointer * * @return ProcessStackPointer * * Return the actual process stack pointer */ __ASM uint32_t __get_PSP(void) { mrs r0, psp bx lr } /** * @brief Set the Process Stack Pointer * * @param topOfProcStack Process Stack Pointer * * Assign the value ProcessStackPointer to the MSP * (process stack pointer) Cortex processor register */ __ASM void __set_PSP(uint32_t topOfProcStack) { msr psp, r0 bx lr } /** * @brief Return the Main Stack Pointer * * @return Main Stack Pointer * * Return the current value of the MSP (main stack pointer) * Cortex processor register */ __ASM uint32_t __get_MSP(void) { mrs r0, msp bx lr } /** * @brief Set the Main Stack Pointer * * @param topOfMainStack Main Stack Pointer * * Assign the value mainStackPointer to the MSP * (main stack pointer) Cortex processor register */ __ASM void __set_MSP(uint32_t mainStackPointer) { msr msp, r0 bx lr } /** * @brief Reverse byte order in unsigned short value * * @param value value to reverse * @return reversed value * * Reverse byte order in unsigned short value */ __ASM uint32_t __REV16(uint16_t value) { rev16 r0, r0 bx lr } /** * @brief Reverse byte order in signed short value with sign extension to integer * * @param value value to reverse * @return reversed value * * Reverse byte order in signed short value with sign extension to integer */ __ASM int32_t __REVSH(int16_t value) { revsh r0, r0 bx lr } #if (__ARMCC_VERSION < 400000) /** * @brief Remove the exclusive lock created by ldrex * * Removes the exclusive lock which is created by ldrex. */ __ASM void __CLREX(void) { clrex } /** * @brief Return the Base Priority value * * @return BasePriority * * Return the content of the base priority register */ __ASM uint32_t __get_BASEPRI(void) { mrs r0, basepri bx lr } /** * @brief Set the Base Priority value * * @param basePri BasePriority * * Set the base priority register */ __ASM void __set_BASEPRI(uint32_t basePri) { msr basepri, r0 bx lr } /** * @brief Return the Priority Mask value * * @return PriMask * * Return state of the priority mask bit from the priority mask register */ __ASM uint32_t __get_PRIMASK(void) { mrs r0, primask bx lr } /** * @brief Set the Priority Mask value * * @param priMask PriMask * * Set the priority mask bit in the priority mask register */ __ASM void __set_PRIMASK(uint32_t priMask) { msr primask, r0 bx lr } /** * @brief Return the Fault Mask value * * @return FaultMask * * Return the content of the fault mask register */ __ASM uint32_t __get_FAULTMASK(void) { mrs r0, faultmask bx lr } /** * @brief Set the Fault Mask value * * @param faultMask faultMask value * * Set the fault mask register */ __ASM void __set_FAULTMASK(uint32_t faultMask) { msr faultmask, r0 bx lr } /** * @brief Return the Control Register value * * @return Control value * * Return the content of the control register */ __ASM uint32_t __get_CONTROL(void) { mrs r0, control bx lr } /** * @brief Set the Control Register value * * @param control Control value * * Set the control register */ __ASM void __set_CONTROL(uint32_t control) { msr control, r0 bx lr } #endif /* __ARMCC_VERSION */ #elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ /* IAR iccarm specific functions */ #pragma diag_suppress=Pe940 /** * @brief Return the Process Stack Pointer * * @return ProcessStackPointer * * Return the actual process stack pointer */ uint32_t __get_PSP(void) { __ASM("mrs r0, psp"); __ASM("bx lr"); } /** * @brief Set the Process Stack Pointer * * @param topOfProcStack Process Stack Pointer * * Assign the value ProcessStackPointer to the MSP * (process stack pointer) Cortex processor register */ void __set_PSP(uint32_t topOfProcStack) { __ASM("msr psp, r0"); __ASM("bx lr"); } /** * @brief Return the Main Stack Pointer * * @return Main Stack Pointer * * Return the current value of the MSP (main stack pointer) * Cortex processor register */ uint32_t __get_MSP(void) { __ASM("mrs r0, msp"); __ASM("bx lr"); } /** * @brief Set the Main Stack Pointer * * @param topOfMainStack Main Stack Pointer * * Assign the value mainStackPointer to the MSP * (main stack pointer) Cortex processor register */ void __set_MSP(uint32_t topOfMainStack) { __ASM("msr msp, r0"); __ASM("bx lr"); } /** * @brief Reverse byte order in unsigned short value * * @param value value to reverse * @return reversed value * * Reverse byte order in unsigned short value */ uint32_t __REV16(uint16_t value) { __ASM("rev16 r0, r0"); __ASM("bx lr"); } /** * @brief Reverse bit order of value * * @param value value to reverse * @return reversed value * * Reverse bit order of value */ uint32_t __RBIT(uint32_t value) { __ASM("rbit r0, r0"); __ASM("bx lr"); } /** * @brief LDR Exclusive (8 bit) * * @param *addr address pointer * @return value of (*address) * * Exclusive LDR command for 8 bit values) */ uint8_t __LDREXB(uint8_t *addr) { __ASM("ldrexb r0, [r0]"); __ASM("bx lr"); } /** * @brief LDR Exclusive (16 bit) * * @param *addr address pointer * @return value of (*address) * * Exclusive LDR command for 16 bit values */ uint16_t __LDREXH(uint16_t *addr) { __ASM("ldrexh r0, [r0]"); __ASM("bx lr"); } /** * @brief LDR Exclusive (32 bit) * * @param *addr address pointer * @return value of (*address) * * Exclusive LDR command for 32 bit values */ uint32_t __LDREXW(uint32_t *addr) { __ASM("ldrex r0, [r0]"); __ASM("bx lr"); } /** * @brief STR Exclusive (8 bit) * * @param value value to store * @param *addr address pointer * @return successful / failed * * Exclusive STR command for 8 bit values */ uint32_t __STREXB(uint8_t value, uint8_t *addr) { __ASM("strexb r0, r0, [r1]"); __ASM("bx lr"); } /** * @brief STR Exclusive (16 bit) * * @param value value to store * @param *addr address pointer * @return successful / failed * * Exclusive STR command for 16 bit values */ uint32_t __STREXH(uint16_t value, uint16_t *addr) { __ASM("strexh r0, r0, [r1]"); __ASM("bx lr"); } /** * @brief STR Exclusive (32 bit) * * @param value value to store * @param *addr address pointer * @return successful / failed * * Exclusive STR command for 32 bit values */ uint32_t __STREXW(uint32_t value, uint32_t *addr) { __ASM("strex r0, r0, [r1]"); __ASM("bx lr"); } #pragma diag_default=Pe940 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ /* GNU gcc specific functions */ /** * @brief Return the Process Stack Pointer * * @return ProcessStackPointer * * Return the actual process stack pointer */ uint32_t __get_PSP(void) __attribute__( ( naked ) ); uint32_t __get_PSP(void) { uint32_t result=0; __ASM volatile ("MRS %0, psp\n\t" "MOV r0, %0 \n\t" "BX lr \n\t" : "=r" (result) ); return(result); } /** * @brief Set the Process Stack Pointer * * @param topOfProcStack Process Stack Pointer * * Assign the value ProcessStackPointer to the MSP * (process stack pointer) Cortex processor register */ void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) ); void __set_PSP(uint32_t topOfProcStack) { __ASM volatile ("MSR psp, %0\n\t" "BX lr \n\t" : : "r" (topOfProcStack) ); } /** * @brief Return the Main Stack Pointer * * @return Main Stack Pointer * * Return the current value of the MSP (main stack pointer) * Cortex processor register */ uint32_t __get_MSP(void) __attribute__( ( naked ) ); uint32_t __get_MSP(void) { uint32_t result=0; __ASM volatile ("MRS %0, msp\n\t" "MOV r0, %0 \n\t" "BX lr \n\t" : "=r" (result) ); return(result); } /** * @brief Set the Main Stack Pointer * * @param topOfMainStack Main Stack Pointer * * Assign the value mainStackPointer to the MSP * (main stack pointer) Cortex processor register */ void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) ); void __set_MSP(uint32_t topOfMainStack) { __ASM volatile ("MSR msp, %0\n\t" "BX lr \n\t" : : "r" (topOfMainStack) ); } /** * @brief Return the Base Priority value * * @return BasePriority * * Return the content of the base priority register */ uint32_t __get_BASEPRI(void) { uint32_t result=0; __ASM volatile ("MRS %0, basepri_max" : "=r" (result) ); return(result); } /** * @brief Set the Base Priority value * * @param basePri BasePriority * * Set the base priority register */ void __set_BASEPRI(uint32_t value) { __ASM volatile ("MSR basepri, %0" : : "r" (value) ); } /** * @brief Return the Priority Mask value * * @return PriMask * * Return state of the priority mask bit from the priority mask register */ uint32_t __get_PRIMASK(void) { uint32_t result=0; __ASM volatile ("MRS %0, primask" : "=r" (result) ); return(result); } /** * @brief Set the Priority Mask value * * @param priMask PriMask * * Set the priority mask bit in the priority mask register */ void __set_PRIMASK(uint32_t priMask) { __ASM volatile ("MSR primask, %0" : : "r" (priMask) ); } /** * @brief Return the Fault Mask value * * @return FaultMask * * Return the content of the fault mask register */ uint32_t __get_FAULTMASK(void) { uint32_t result=0; __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); return(result); } /** * @brief Set the Fault Mask value * * @param faultMask faultMask value * * Set the fault mask register */ void __set_FAULTMASK(uint32_t faultMask) { __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) ); } /** * @brief Return the Control Register value * * @return Control value * * Return the content of the control register */ uint32_t __get_CONTROL(void) { uint32_t result=0; __ASM volatile ("MRS %0, control" : "=r" (result) ); return(result); } /** * @brief Set the Control Register value * * @param control Control value * * Set the control register */ void __set_CONTROL(uint32_t control) { __ASM volatile ("MSR control, %0" : : "r" (control) ); } /** * @brief Reverse byte order in integer value * * @param value value to reverse * @return reversed value * * Reverse byte order in integer value */ uint32_t __REV(uint32_t value) { uint32_t result=0; __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); return(result); } /** * @brief Reverse byte order in unsigned short value * * @param value value to reverse * @return reversed value * * Reverse byte order in unsigned short value */ uint32_t __REV16(uint16_t value) { uint32_t result=0; __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); return(result); } /** * @brief Reverse byte order in signed short value with sign extension to integer * * @param value value to reverse * @return reversed value * * Reverse byte order in signed short value with sign extension to integer */ int32_t __REVSH(int16_t value) { uint32_t result=0; __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); return(result); } /** * @brief Reverse bit order of value * * @param value value to reverse * @return reversed value * * Reverse bit order of value */ uint32_t __RBIT(uint32_t value) { uint32_t result=0; __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); return(result); } /** * @brief LDR Exclusive (8 bit) * * @param *addr address pointer * @return value of (*address) * * Exclusive LDR command for 8 bit value */ uint8_t __LDREXB(uint8_t *addr) { uint8_t result=0; __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); return(result); } /** * @brief LDR Exclusive (16 bit) * * @param *addr address pointer * @return value of (*address) * * Exclusive LDR command for 16 bit values */ uint16_t __LDREXH(uint16_t *addr) { uint16_t result=0; __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); return(result); } /** * @brief LDR Exclusive (32 bit) * * @param *addr address pointer * @return value of (*address) * * Exclusive LDR command for 32 bit values */ uint32_t __LDREXW(uint32_t *addr) { uint32_t result=0; __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); return(result); } /** * @brief STR Exclusive (8 bit) * * @param value value to store * @param *addr address pointer * @return successful / failed * * Exclusive STR command for 8 bit values */ uint32_t __STREXB(uint8_t value, uint8_t *addr) { uint32_t result=0; __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); return(result); } /** * @brief STR Exclusive (16 bit) * * @param value value to store * @param *addr address pointer * @return successful / failed * * Exclusive STR command for 16 bit values */ uint32_t __STREXH(uint16_t value, uint16_t *addr) { uint32_t result=0; __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); return(result); } /** * @brief STR Exclusive (32 bit) * * @param value value to store * @param *addr address pointer * @return successful / failed * * Exclusive STR command for 32 bit values */ uint32_t __STREXW(uint32_t value, uint32_t *addr) { uint32_t result=0; __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); return(result); } #elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ /* TASKING carm specific functions */ /* * The CMSIS functions have been implemented as intrinsics in the compiler. * Please use "carm -?i" to get an up to date list of all instrinsics, * Including the CMSIS ones. */ #endif 去掉注解，只做简单的中文注解
最新发布
05-24
__ASM void __CLREX(void) { clrex } __ASM uint32_t __get_BASEPRI(void) { mrs r0, basepri bx lr } __ASM void __set_BASEPRI(uint32_t basePri) { msr basepri, r0 bx lr } __ASM uint32_t __get_...
《Armv8/armv9架构入门指南》-【第十四章】多核处理器
baron-周贺贺-代码改变世界ctw
07-10 818
ARMv8-A 架构为包含多个处理元素的系统提供了重要级别的支持。 ARM 多核处理器（例如 Cortex-A57MPCore 和 Cortex-A53MPCore 处理器）可以包含一到四个内核。使用 Cortex-A57 或 Cortex-A53 处理器的系统几乎总是以这种方式实现。多核处理器可能包含多个能够独立执行指令的内核，这些内核可以被视为单个单元或集群。 ARM 多核技术使集群中的四个组件内核中的任何一个都可以在不使用时关闭以节省电力，例如当设备负载较轻或处于待机模式时。当需要更高的性能时，每个处
《Armv8/armv9架构入门指南》-【第六章】- A64指令集
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