创建仿真任务模板

本文介绍了一个使用Verilog编写的简单测试案例模板,该模板通过一系列任务如读写操作、等待准备状态等来验证硬件模块的功能正确性。具体包括如何初始化、写入数据到消息内存、设置指数和模数长度等步骤,并最终检查运算结果。
  task init_sim();
    begin
      cycle_ctr          = 0;
      error_ctr          = 0;
      tc_ctr             = 0;

      tb_clk             = 0;
      tb_reset_n         = 1;

      tb_cs              = 0;
      tb_we              = 0;
      tb_address         = 8'h00;
      tb_write_data      = 32'h00000000;
    end
  endtask // init_sim

带传递参数的模板

//----------------------------------------------------------------
  // read_word()
  //
  // Read a data word from the given address in the DUT.
  // the word read will be available in the global variable
  // read_data.
  //----------------------------------------------------------------
  task read_word(input [11 : 0] address);
    begin
      tb_address = address;
      tb_cs = 1;
      tb_we = 0;
      #(CLK_PERIOD);
      read_data = tb_read_data;
      tb_cs = 0;

      if (DEBUG)
        begin
          $display("*** (read_word) Reading 0x%08x from 0x%02x.", read_data, address);
          $display("");
        end
    end
  endtask // read_word


  //----------------------------------------------------------------
  // write_word()
  //
  // Write the given word to the DUT using the DUT interface.
  //----------------------------------------------------------------
  task write_word(input [11 : 0] address,
                  input [31 : 0] word);
    begin
      if (DEBUG)
        begin
          $display("*** (write_word) Writing 0x%08x to 0x%02x.", word, address);
          $display("");
        end

      tb_address = address;
      tb_write_data = word;
      tb_cs = 1;
      tb_we = 1;
      #(CLK_PERIOD);
      tb_cs = 0;
      tb_we = 0;
    end
  endtask // write_word


  //----------------------------------------------------------------
  // wait_ready()
  //
  // Wait until the ready flag in the core is set.
  //----------------------------------------------------------------
  task wait_ready();
    begin
      while (tb_read_data != 32'h00000001)
          read_word({GENERAL_PREFIX, ADDR_STATUS});

      if (DEBUG)
        $display("*** (wait_ready) Ready flag has been set.");
    end
  endtask // wait_ready

调用模板

//----------------------------------------------------------------
  // tc1
  //
  // A first, very simple testcase where we want to do:
  // c = m ** e % N with the following (decimal) test values:
  //  m = 3
  //  e = 7
  //  n = 11
  //  c = 3 ** 7 % 11 = 9
  //----------------------------------------------------------------
  task tc1();
    reg [31 : 0] read_data;

    begin
      tc_ctr = tc_ctr + 1;
      $display("TC1: Trying to calculate 3**7 mod 11 = 9");

      // Write 3 to message memory.
      write_word({GENERAL_PREFIX, ADDR_MESSAGE_PTR_RST}, 32'h00000000);
      write_word({GENERAL_PREFIX, ADDR_MESSAGE_DATA}, 32'h00000003);

      // Write 7 to exponent memory and set length to one word.
      write_word({GENERAL_PREFIX, ADDR_EXPONENT_PTR_RST}, 32'h00000000);
      write_word({GENERAL_PREFIX, ADDR_EXPONENT_DATA}, 32'h00000007);
      write_word({GENERAL_PREFIX, ADDR_EXPONENT_LENGTH}, 32'h00000001);

      // Write 11 to modulus memory and set length to one word.
      write_word({GENERAL_PREFIX, ADDR_MODULUS_PTR_RST}, 32'h00000000);
      write_word({GENERAL_PREFIX, ADDR_MODULUS_DATA}, 32'h0000000b);
      write_word({GENERAL_PREFIX, ADDR_MODULUS_LENGTH}, 32'h00000001);

      start_test_cycle_ctr();

      // Start processing and wait for ready.
      write_word({GENERAL_PREFIX, ADDR_CTRL}, 32'h00000001);
      wait_ready();

      stop_test_cycle_ctr();

      // Read out result word and check result.
      write_word({GENERAL_PREFIX, ADDR_RESULT_PTR_RST}, 32'h00000000);
      read_word({GENERAL_PREFIX, ADDR_RESULT_DATA});
      read_data = tb_read_data;

      if (read_data == 32'h00000009)
        begin
          $display("*** TC1 successful.");
          $display("");
        end
      else
        begin
          $display("*** ERROR: TC1 NOT successful.");
          $display("Expected: 0x09, got 0x%08x", read_data);
          error_ctr = error_ctr + 1;
        end
    end
  endtask // tc1

主函数模板

  initial
    begin : main
      init_sim();

      reset_dut();
//      rob_dec_1024();
      rob_enc_1024();

      $finish;
    end // main

 

转载于:https://www.cnblogs.com/yssrf-possible/p/10650255.html

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