声明寄存器ROM

最新推荐文章于 2024-07-15 21:58:10 发布

weixin_30411819

最新推荐文章于 2024-07-15 21:58:10 发布

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CC 4.0 BY-SA版权

原文链接：http://www.cnblogs.com/yssrf-possible/p/7515168.html

不太建议使用该方法，建议还是直接使用IP核


reg [31:0] ROM [4095:0] ;

   integer i;
   initial begin
     for (i=0;i<=4095;i=i+1) begin
       ROM[i] <= {31{1'b0}};
     end
   end

同时可以考虑双端口ROM

module ram_2port
  #(parameter DWIDTH=32,
    parameter AWIDTH=9)
    (input clka,
     input ena,
     input wea,
     input [AWIDTH-1:0] addra,
     input [DWIDTH-1:0] dia,
     output reg [DWIDTH-1:0] doa = 'd0,

     input clkb,
     input enb,
     input web,
     input [AWIDTH-1:0] addrb,
     input [DWIDTH-1:0] dib,
     output reg [DWIDTH-1:0] dob = 'd0);

   reg [DWIDTH-1:0] ram [(1<<AWIDTH)-1:0];

   /*
   integer i;
   initial begin
     for (i=0;i<(1<<AWIDTH);i=i+1) begin
       ram[i] <= {DWIDTH{1'b0}};
     end
   end
   */

   always @(posedge clka) begin
      if (ena)
        begin
           if (wea)
             ram[addra] <= dia;
           doa <= ram[addra];
        end
   end
   always @(posedge clkb) begin
      if (enb)
        begin
           if (web)
             ram[addrb] <= dib;
           dob <= ram[addrb];
        end
   end
endmodule // ram_2port