<?xml version="1.0" encoding="utf-8" ?><rss version="2.0"><channel><title><![CDATA[wechatli的博客]]></title><description><![CDATA[]]></description><link>https://blog.youkuaiyun.com/wechatli</link><language>zh-cn</language><generator>https://blog.youkuaiyun.com/</generator><copyright><![CDATA[Copyright &copy; wechatli]]></copyright><item><title><![CDATA[2位累加器的设计与EDA仿真]]></title><link>https://blog.youkuaiyun.com/wechatli/article/details/135157662</link><guid>https://blog.youkuaiyun.com/wechatli/article/details/135157662</guid><author>wechatli</author><pubDate>Fri, 22 Dec 2023 18:23:52 +0800</pubDate><description><![CDATA[传输门型2位累加器的设计与EDA仿真]]></description><category></category></item><item><title><![CDATA[基于FPGA的“乘法器”设计]]></title><link>https://blog.youkuaiyun.com/wechatli/article/details/131227793</link><guid>https://blog.youkuaiyun.com/wechatli/article/details/131227793</guid><author>wechatli</author><pubDate>Thu, 15 Jun 2023 15:19:37 +0800</pubDate><description><![CDATA[乘法器的两个乘数是4位2进制数，输入乘积项是8位位宽的2进制数。当乘数准备好后，START信号有效，电路开始进行乘法运算，当乘法运算结束后，电路输出DONE有效信号。另一个控制信号是RESET信号，用来完成复位时使用。乘法电路采用的算法要求使用加法和移位相结合的算法来实现电路。二进制数乘法过程可仿照十进制数乘法进行。]]></description><category></category></item></channel></rss>