sPL_LOG_STORE: check once, sig value 0x835437AC, addr 0x102180.
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] PL_LOG_STORE:sram->sig value 0x6144AC64!
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] PL_LOG_STORE:sram header is not match, format all!
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] PL_LOG_STORE:set ram_header->sig = 0xABCD1234
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] ramrom delsel: 0x06C4E4F3
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] bandgap ref vol: 0x302012A8
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] Pll init start...
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] Pll init Done!
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] rst from: ?
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] MODE: 0x4D
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] STA: 0x0
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] LENGTH: 0xFFE0
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] INTERVAL: 0xFFF
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] SWSYSRST: 0x8000
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] LATCH_CTL: 0x0
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] NONRST_REG: 0x0
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] NONRST_REG2: 0x20000000
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] DEBUG_CTL: 0x200F1
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] parse g_rgu_status: 0 (0x0)
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] Set NONRST_REG to 0x0
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] mtk_wdt_mode_config mode value=30, tmp:22000030
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] mtk_wdt_mode_config mode value=7D, tmp:2200007D
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2)
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: 0x200F1
[2025-09-14 13:48:59.257]
[2025-09-14 13:48:59.257] [RGU] rgu_update_reg: 0, bits: 0x300, addr: 0x100070A0, val: 0xFF
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [RGU] mtk_wdt_pre_init: MTK_WDT_DEBUG_CTL(0x200F1)
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [RGU] mtk_wdt_pre_init: MTK_WDT_DEBUG_CTL2(0xFF)
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [RGU] mtk_wdt_pre_init: MTK_WDT_LATCH_CTL(0x21E71)
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [RGU] mtk_wdt_pre_init: MTK_WDT_REQ_MODE(3F0032), MTK_WDT_REQ_IRQ_EN(3F0032)
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [PWRAP] InitSiStrobe (7, 7, DA65) Data Boundary Is Found !!
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 7)
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [PWRAP] Read Test pass, return_value=0x0
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [PWRAP] Write Test pass
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [PWRAP] RECORD_CMD0: 0x0 (Last one command addr)
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [PWRAP] RECORD_WDATA0:0x0 (Last one command wdata)
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [PWRAP] RECORD_CMD1: 0x0 (Last second command addr)
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [PWRAP] RECORD_WDATA1:0x0 (Last second command wdata)
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [PWRAP] RECORD_CMD2: 0x0 (Last third command addr)
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [PWRAP] RECORD_WDATA2:0x0 (Last third command wdata)
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] [PWRAP] init pass, ret=0.
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289]
[2025-09-14 13:48:59.289] DATE_CODE_YY:0, DATE_CODE_WW:0
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [SegCode] Segment Code:0x80, PROJECT_CODE:0x0, FAB_CODE:0x0, RW_STA:0x0, CTL:0x0, DCM:0x4
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]Preloader Start
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]MT6357 CHIP Code = 0x5730, mrv=1
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]POWER_HOLD :0x1
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]TOP_RST_STATUS[0x152]=0x0
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]PONSTS[0xC]=0x4
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]POFFSTS[0xE]=0x0
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]PGSTATUS0[0x14]=0xFFFE
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]PSOCSTATUS[0x16]=0x0
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]BUCK_OC_SDN_EN[0x1444]=0x1E9F
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]THERMALSTATUS[0x18]=0x0
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]STRUP_CON4[0xA1C]=0x0
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]TOP_RST_MISC[0x14C]=0x200
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] latch VPROC 800000 uV
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] latch VSRAM_PROC 1068750 uV
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] latch VSRAM_OTHERS 900000 uV
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] latch VCORE 800000 uV
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] latch VMODEM 800000 uV
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [pmic_check_rst] PORSTB
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]just_rst = 0
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] No EFUSE SW Load
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] battery exists
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]disable usbdl wo battery
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [PMIC]pmic_wdt_set Reg[0x14C]=0x221
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [rt5738_driver_probe]
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [rt5738_hw_component_detect] exist = 0, Chip ID = A801
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [rt5738_driver_probe] PL rt5738_vdd2 is not exist
[2025-09-14 13:48:59.320]
[2025-09-14 13:48:59.320] [rt5738_hw_component_detect] exist = 0, Chip ID = A801
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [rt5738_driver_probe] PL rt5738_vddq is not exist
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_driver_probe]
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_read_interface] Reg[3]=0xA8
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_read_interface] val=0xA8
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_read_interface] Reg[4]=0x1
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_read_interface] val=0x1
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_read_interface] Reg[5]=0x81
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_read_interface] val=0x1
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] PGOOD = 1, chip_id = 43009
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_hw_component_detect] exist = 1, Chip ID = A801
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] hl7593_vdd2_hw_init
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_read_interface] Reg[0]=0xD4
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_read_interface] val=0xD4
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [0x0]=0xD4 [hl7593_read_interface] Reg[1]=0xD4
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_read_interface] val=0xD4
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [0x1]=0xD4 [hl7593_read_interface] Reg[2]=0x82
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_read_interface] val=0x82
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [0x2]=0x82 [hl7593_read_interface] Reg[3]=0xA8
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_read_interface] val=0xA8
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [0x3]=0xA8 [hl7593_read_interface] Reg[4]=0x1
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_read_interface] val=0x1
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [0x4]=0x1 [hl7593_read_interface] Reg[5]=0x81
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [hl7593_read_interface] val=0x81
[2025-09-14 13:48:59.347]
[2025-09-14 13:48:59.347] [0x5]=0x81 [hl7593_driver_probe] PL g_hl7593_0_hw_exist=1, g_hl7593_driver_ready=1
[2025-09-14 13:48:59.377]
[2025-09-14 13:48:59.377] [hl7593_read_interface] Reg[3]=0xA8
[2025-09-14 13:48:59.377]
[2025-09-14 13:48:59.377] [hl7593_read_interface] val=0xA8
[2025-09-14 13:48:59.377]
[2025-09-14 13:48:59.377] [hl7593_read_interface] Reg[4]=0x1
[2025-09-14 13:48:59.377]
[2025-09-14 13:48:59.377] [hl7593_read_interface] val=0x1
[2025-09-14 13:48:59.377]
[2025-09-14 13:48:59.377] [hl7593_read_interface] Reg[5]=0x81
[2025-09-14 13:48:59.377]
[2025-09-14 13:48:59.377] [hl7593_read_interface] val=0x1
[2025-09-14 13:48:59.377]
[2025-09-14 13:48:59.377] PGOOD = 1, chip_id = 43009
[2025-09-14 13:48:59.377]
[2025-09-14 13:48:59.377] [hl7593_hw_component_detect] exist = 1, Chip ID = A801
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] hl7593_vddq_hw_init
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] [hl7593_read_interface] Reg[0]=0x80
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] [hl7593_read_interface] val=0x80
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] [0x0]=0x80 [hl7593_read_interface] Reg[1]=0x80
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] [hl7593_read_interface] val=0x80
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] [0x1]=0x80 [hl7593_read_interface] Reg[2]=0x82
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] [hl7593_read_interface] val=0x82
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] [0x2]=0x82 [hl7593_read_interface] Reg[3]=0xA8
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] [hl7593_read_interface] val=0xA8
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] [0x3]=0xA8 [hl7593_read_interface] Reg[4]=0x1
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] [hl7593_read_interface] val=0x1
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] [0x4]=0x1 [hl7593_read_interface] Reg[5]=0x81
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] [hl7593_read_interface] val=0x81
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] [0x5]=0x81 [hl7593_driver_probe] PL g_hl7593_1_hw_exist=1, g_hl7593_driver_ready=1
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.378] [hl7593_set_voltage] id = 0, set_val = 1125000
[2025-09-14 13:48:59.378]
[2025-09-14 13:48:59.408] [hl7593_read_interface] Reg[0]=0xD4
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [hl7593_read_interface] val=0x54
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [hl7593_get_voltage] id = 0, get_val = 1125000
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] hl7593_vdd2=1125000 uV
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [hl7593_read_interface] Reg[1]=0x80
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [hl7593_read_interface] val=0x0
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [hl7593_get_voltage] id = 1, get_val = 600000
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] hl7593_vddq=600000 uV
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [fan53526_driver_probe]
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [I2C] 365: id=3,addr: 60, transfer error
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [I2C] 371: I2C_ACKERR
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [I2C] 235: I2C structure:
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [I2C] Clk=24960,Id=3,Mode=1,St_rs=0,Dma_en=0,Op=3,Poll_en=1,Irq_stat=2
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [I2C] Trans_len=1,Trans_num=2,Trans_auxlen=1,Data_size=FFFF,speed=100
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [I2C] 238: base address 0x1100F000
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [I2C] 259: I2C register:
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [I2C] SLAVE_ADDR=C0,INTR_MASK=1F8,INTR_STAT=3,CONTROL=38,TRANSFER_LEN=1
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [I2C] TRANSAC_LEN=2,DELAY_LEN=A,TIMING=418,LTIMING=118,START=2,FIFO_STAT=1
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [I2C] IO_CONFIG=1A3,HS=0,DEBUGSTAT=0,EXT_CONF=8001,TRANSFER_LEN_AUX=1,CLOCK_DIV=4
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [I2C] 924: write_read 0x10001 bytes fails,ret=-121.
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [I2C] 365: id=3,addr: 60, transfer error
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [I2C] 371: I2C_ACKERR
[2025-09-14 13:48:59.408]
[2025-09-14 13:48:59.408] [I2C] 235: I2C structure:
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] Clk=24960,Id=3,Mode=1,St_rs=0,Dma_en=0,Op=3,Poll_en=1,Irq_stat=2
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] Trans_len=1,Trans_num=2,Trans_auxlen=1,Data_size=FFFF,speed=100
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] 238: base address 0x1100F000
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] 259: I2C register:
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] SLAVE_ADDR=C0,INTR_MASK=1F8,INTR_STAT=3,CONTROL=38,TRANSFER_LEN=1
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] TRANSAC_LEN=2,DELAY_LEN=A,TIMING=418,LTIMING=118,START=2,FIFO_STAT=1
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] IO_CONFIG=1A3,HS=0,DEBUGSTAT=0,EXT_CONF=8001,TRANSFER_LEN_AUX=1,CLOCK_DIV=4
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] 924: write_read 0x10001 bytes fails,ret=-121.
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] 365: id=3,addr: 60, transfer error
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] 371: I2C_ACKERR
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] 235: I2C structure:
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] Clk=24960,Id=3,Mode=1,St_rs=0,Dma_en=0,Op=3,Poll_en=1,Irq_stat=2
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] Trans_len=1,Trans_num=2,Trans_auxlen=1,Data_size=FFFF,speed=100
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] 238: base address 0x1100F000
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] 259: I2C register:
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] SLAVE_ADDR=C0,INTR_MASK=1F8,INTR_STAT=3,CONTROL=38,TRANSFER_LEN=1
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] TRANSAC_LEN=2,DELAY_LEN=A,TIMING=418,LTIMING=118,START=2,FIFO_STAT=1
[2025-09-14 13:48:59.439]
[2025-09-14 13:48:59.439] [I2C] IO_CONFIG=1A3,HS=0,DEBUGSTAT=0,EXT_CONF=8001,TRANSFER_LEN_AUX=1,CLOCK_DIV=4
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [I2C] 924: write_read 0x10001 bytes fails,ret=-121.
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [fan53526_hw_component_detect] exist = 0, Chip ID = 304
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [fan53526_driver_probe] PL fan53526_vdd2 is not exist
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [fan53526_hw_component_detect] exist = 0, Chip ID = A801
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [fan53526_driver_probe] PL fan53526_vddq is not exist
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] register vs1 OK
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] register vmodem OK
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] register vcore OK
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] register vproc OK
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] register vpa OK
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] register vsram_others OK
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] register vsram_proc OK
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] register vdram OK
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [PMIC]Init done
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [SD0] Host controller intialization start
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) DIV(385) DS(0) RS(0)
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [SD0] Host controller intialization done
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [mmc_init]: msdc0 start mmc_init_card()
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [mmc_init_card]: start
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [SD0] EXT_CSD_ERASE_GRP_DEF is Off, wp_size = 8192KB
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [SD0] csd.write_prot_grpsz = 15, csd.erase_sctsz = 1024
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [SD0] Switch to High-Speed mode!
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [SD0] Switch to DDR buswidth
[2025-09-14 13:48:59.472]
[2025-09-14 13:48:59.472] [SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(2) DDR(1) DIV(192) DS(0) RS(0)
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] [SD0] Size: 7296 MB, Max.Speed: 52000 kHz, blklen(512), nblks(14942208)
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] [SD0] Initialized, eMMC45
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] [SD0] SET_CLK(52000kHz): SCLK(50000kHz) MODE(2) DDR(1) DIV(1) DS(0) RS(0)
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] [mmc_init_card]: finish successfully
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] [PLFM] Init Boot Device: OK(0)
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] [PLFM] Init PWRAP: OK(0)
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] [PLFM] Init PMIC: OK(0)
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] [PLFM] chip_hw_ver[CA01], chip_sw_ver[1]
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] [BLDR] Build Time: 20230323-154644
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 0 0
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=1 1 1 1 1 1 1
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x6B6D 386A AD00 9829 A2B5 A19A A8AA 11 1
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 386A 8000 98E9 A2B5 A2AA 9455 11 0
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] [RTC]get_frequency_meter: input=0x0, ouput=5
[2025-09-14 13:48:59.501]
[2025-09-14 13:48:59.501] [RTC]get_frequency_meter: input=0x0, ouput=0
[2025-09-14 13:48:59.517]
[2025-09-14 13:48:59.517] [RTC]get_frequency_meter: input=0x0, ouput=0
[2025-09-14 13:48:59.517]
[2025-09-14 13:48:59.517] [RTC]get_frequency_meter: input=0x0, ouput=0
[2025-09-14 13:48:59.517]
[2025-09-14 13:48:59.517] [RTC]get_frequency_meter: input=0x0, ouput=0
[2025-09-14 13:48:59.517]
[2025-09-14 13:48:59.517] [RTC]RTC 32K mode setting wrong. Enter first boot/recovery.
[2025-09-14 13:48:59.517]
[2025-09-14 13:48:59.517] [RTC]rtc_init#1 powerkey1 = 0xC99F, powerkey2 = 0x5D67, with LPD
[2025-09-14 13:48:59.517]
[2025-09-14 13:48:59.517] [RTC]bbpu = 0x49, con = 0x87BF, osc32con = 0xBD3F, sec = 0xB1F5, yea = 0x6D7E
[2025-09-14 13:48:59.517]
[2025-09-14 13:48:59.517] [RTC]rtc_first_boot_init
[2025-09-14 13:48:59.517]
[2025-09-14 13:48:59.517] [RTC]XO_XMODE_M = 1 , XO_EN32K_M = 1
[2025-09-14 13:48:59.517]
[2025-09-14 13:48:59.566] [RTC]rtc_lpd_init RTC_CON=0x486
[2025-09-14 13:48:59.566]
[2025-09-14 13:48:59.566] [RTC]get_frequency_meter: input=0x0, ouput=5
[2025-09-14 13:48:59.566]
[2025-09-14 13:48:59.566] [RTC]get_frequency_meter: input=0x0, ouput=0
[2025-09-14 13:48:59.566]
[2025-09-14 13:48:59.566] [RTC]get_frequency_meter: input=0x0, ouput=0
[2025-09-14 13:48:59.566]
[2025-09-14 13:48:59.566] [RTC]get_frequency_meter: input=0x0, ouput=5
[2025-09-14 13:48:59.566]
[2025-09-14 13:48:59.566] [RTC]get_frequency_meter: input=0x0, ouput=2637
[2025-09-14 13:48:59.566]
[2025-09-14 13:48:59.695] [RTC]get_frequency_meter: input=0x0, ouput=5
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]get_frequency_meter: input=0x0, ouput=0
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]get_frequency_meter: input=0x0, ouput=0
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]get_frequency_meter: input=0x0, ouput=5
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]get_frequency_meter: input=0x0, ouput=2636
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]eosc_cali: RG_FQMTR_CKSEL=0x42
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]get_frequency_meter: input=0xF, ouput=726
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]eosc_cali: val=0x2D6
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]get_frequency_meter: input=0x17, ouput=893
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]eosc_cali: val=0x37D
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]get_frequency_meter: input=0x13, ouput=809
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]eosc_cali: val=0x329
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]get_frequency_meter: input=0x11, ouput=768
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]eosc_cali: val=0x300
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]get_frequency_meter: input=0x12, ouput=788
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]eosc_cali: val=0x314
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]get_frequency_meter: input=0x12, ouput=789
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]get_frequency_meter: input=0x13, ouput=808
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]EOSC cali val = 0x12
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]EOSC cali val = 0xDE52
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]rtc_lpd_init RTC_CON=0x486
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]rtc_2sec_stat_clear
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]XO_XMODE_M = 1 , XO_EN32K_M = 1
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]32k-less mode
[2025-09-14 13:48:59.695]
[2025-09-14 13:48:59.695] [RTC]rtc_2sec_reboot_check 0x6404, without 2sec reboot, type 0x2
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [RTC]rtc 2sec reboot is not enabled
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [RTC]rtc_lpd_init RTC_CON=0x486
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [PMIC] pmic_init_setting end. v180413
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [MT6357] 1 6,61
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [MT6357] 1 2,45
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [MT6357] 1 1,48
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [MT6357] get volt 5, 61, 900000
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] vsram_others = 900000 uV
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [MT6357] get volt 3, 45, 800000
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] vproc = 800000 uV
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [MT6357] get volt 6, 61, 900000
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] vsram_proc = 900000 uV
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [MT6357] get volt 2, 45, 800000
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] vcore = 800000 uV
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [MT6357] get volt 1, 48, 800000
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] vmodem = 800000 uV
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [MT6357] 2 6,1
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [MT6357] 2 5,1
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [MT6357] 2 3,1
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [MT6357] 2 2,1
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [MT6357] 2 1,1
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [RGU] EMI_DCS_SUCCESS 0
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [RGU] DVFSRC_SUCCESS 0
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [DDR Reserve] ddr reserve mode not be enabled yet
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [RGU] mtk_wdt_mode_config mode value=30, tmp:22000030
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [RGU] mtk_wdt_mode_config mode value=7D, tmp:2200007D
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [RGU] g_rgu_status: 0 (0x0)
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] [RGU] bypass pwrkey: wdt does not trigger rst
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.708] Enter mtk_kpd_gpio_set!
[2025-09-14 13:48:59.708]
[2025-09-14 13:48:59.723] after set KP enable: KP_SEL = 0x1C70 !
[2025-09-14 13:48:59.723]
[2025-09-14 13:48:59.723] [RTC]irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x80, spar1 = 0x800
[2025-09-14 13:48:59.723]
[2025-09-14 13:48:59.723] [RTC]new_spare0 = 0xE000, new_spare1 = 0x5001, new_spare2 = 0x1, new_spare3 = 0x1
[2025-09-14 13:48:59.723]
[2025-09-14 13:48:59.723] [RTC]bbpu = 0x1, con = 0x486, cali = 0x2404, osc32con = 0xDE72
[2025-09-14 13:48:59.723]
[2025-09-14 13:48:59.723] pmic_reboot: 0!
[2025-09-14 13:48:59.723]
[2025-09-14 13:48:59.723] [PMIC]IsUsbCableIn 1
[2025-09-14 13:48:59.723]
[2025-09-14 13:48:59.723] [PLFM] USB/charger boot!
[2025-09-14 13:48:59.723]
[2025-09-14 13:48:59.723] [PMIC]POWER_HOLD :0x1
[2025-09-14 13:48:59.723]
[2025-09-14 13:48:59.723] [RTC]rtc_lpsd_solution
[2025-09-14 13:48:59.723]
[2025-09-14 13:48:59.723] [RTC]1st RTC_AL_MASK= 0x0
[2025-09-14 13:48:59.723]
[2025-09-14 13:48:59.723] [RTC]2nd RTC_AL_MASK= 0x7F
[2025-09-14 13:48:59.723]
[2025-09-14 13:48:59.723] [RTC]rtc_bbpu_power_on done
[2025-09-14 13:48:59.723]
[2025-09-14 13:48:59.723] pl chr:1 monitor:1 plchr:1 gain:1042
[2025-09-14 13:48:59.723]
[2025-09-14 13:48:59.723] mtk_kpd_gpio_set Already!
[2025-09-14 13:48:59.723]
[2025-09-14 13:48:59.723] Log Turned Off.
[2025-09-14 13:48:59.723]
[2025-09-14 13:49:00.001] sPL_LOG_STORE: check once, sig value 0x800, addr 0x102180.
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] PL_LOG_STORE:sram->sig value 0xABCD1234!
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] ramrom delsel: 0x06C4E4F3
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] bandgap ref vol: 0x302012A8
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] Pll init start...
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] Pll init Done!
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] [RGU] rst from: pl
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] [RGU] MODE: 0x25
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] [RGU] STA: 0x40000000
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] [RGU] LENGTH: 0xFFE0
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] [RGU] INTERVAL: 0xFFF
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] [RGU] SWSYSRST: 0x8000
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] [RGU] LATCH_CTL: 0x21E71
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] [RGU] NONRST_REG: 0x0
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] [RGU] NONRST_REG2: 0x24002000
[2025-09-14 13:49:00.001]
[2025-09-14 13:49:00.001] [RGU] DEBUG_CTL: 0x200F1
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [RGU] parse g_rgu_status: 2 (0x2)
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [RGU] Set NONRST_REG to 0x40000000
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [RGU] mtk_wdt_mode_config mode value=30, tmp:22000030
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [RGU] mtk_wdt_mode_config mode value=7D, tmp:2200007D
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2)
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: 0x200F1
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [RGU] rgu_update_reg: 0, bits: 0x300, addr: 0x100070A0, val: 0xFF
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [RGU] mtk_wdt_pre_init: MTK_WDT_DEBUG_CTL(0x200F1)
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [RGU] mtk_wdt_pre_init: MTK_WDT_DEBUG_CTL2(0xFF)
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [RGU] mtk_wdt_pre_init: MTK_WDT_LATCH_CTL(0x21E71)
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [RGU] mtk_wdt_pre_init: MTK_WDT_REQ_MODE(3F0032), MTK_WDT_REQ_IRQ_EN(3F0032)
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [PWRAP] InitSiStrobe (7, 7, DA65) Data Boundary Is Found !!
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 7)
[2025-09-14 13:49:00.015]
[2025-09-14 13:49:00.015] [PWRAP] Read Test pass, return_value=0x0
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PWRAP] Write Test pass
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PWRAP] RECORD_CMD0: 0x152A (Last one command addr)
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PWRAP] RECORD_WDATA0:0x2D (Last one command wdata)
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PWRAP] RECORD_CMD1: 0x196C (Last second command addr)
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PWRAP] RECORD_WDATA1:0x0 (Last second command wdata)
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PWRAP] RECORD_CMD2: 0x170E (Last third command addr)
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PWRAP] RECORD_WDATA2:0x7A (Last third command wdata)
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PWRAP] init pass, ret=0.
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] DATE_CODE_YY:0, DATE_CODE_WW:0
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [SegCode] Segment Code:0x80, PROJECT_CODE:0x0, FAB_CODE:0x0, RW_STA:0x0, CTL:0x0, DCM:0x4
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PMIC]Preloader Start
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PMIC]MT6357 CHIP Code = 0x5730, mrv=1
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PMIC]POWER_HOLD :0x1
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PMIC]TOP_RST_STATUS[0x152]=0x48
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PMIC]PONSTS[0xC]=0x0
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PMIC]POFFSTS[0xE]=0x400
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.042] [PMIC]PGSTATUS0[0x14]=0xFFFE
[2025-09-14 13:49:00.042]
[2025-09-14 13:49:00.043] [PMIC]PSOCSTATUS[0x16]=0x0
[2025-09-14 13:49:00.043]
[2025-09-14 13:49:00.043] [PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0
[2025-09-14 13:49:00.043]
[2025-09-14 13:49:00.043] [PMIC]BUCK_OC_SDN_EN[0x1444]=0x1E9F
[2025-09-14 13:49:00.043]
[2025-09-14 13:49:00.043] [PMIC]THERMALSTATUS[0x18]=0x0
[2025-09-14 13:49:00.043]
[2025-09-14 13:49:00.043] [PMIC]STRUP_CON4[0xA1C]=0x0
[2025-09-14 13:49:00.043]
[2025-09-14 13:49:00.043] [PMIC]TOP_RST_MISC[0x14C]=0x1204
[2025-09-14 13:49:00.043]
[2025-09-14 13:49:00.043] [PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0
[2025-09-14 13:49:00.043]
[2025-09-14 13:49:00.043] latch VPROC 800000 uV
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] latch VSRAM_PROC 900000 uV
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] latch VSRAM_OTHERS 900000 uV
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] latch VCORE 800000 uV
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] latch VMODEM 800000 uV
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [pmic_check_rst] DDLO_RSTB
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [pmic_check_rst] AP Watchdog
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [PMIC]just_rst = 0
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] No EFUSE SW Load
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] battery exists
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [PMIC]disable usbdl wo battery
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [PMIC]pmic_wdt_set Reg[0x14C]=0x1225
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [rt5738_driver_probe]
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [rt5738_hw_component_detect] exist = 0, Chip ID = A801
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [rt5738_driver_probe] PL rt5738_vdd2 is not exist
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [rt5738_hw_component_detect] exist = 0, Chip ID = A801
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [rt5738_driver_probe] PL rt5738_vddq is not exist
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [hl7593_driver_probe]
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [hl7593_read_interface] Reg[3]=0xA8
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [hl7593_read_interface] val=0xA8
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [hl7593_read_interface] Reg[4]=0x1
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [hl7593_read_interface] val=0x1
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [hl7593_read_interface] Reg[5]=0x81
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [hl7593_read_interface] val=0x1
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] PGOOD = 1, chip_id = 43009
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [hl7593_hw_component_detect] exist = 1, Chip ID = A801
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] hl7593_vdd2_hw_init
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [hl7593_read_interface] Reg[0]=0xD4
[2025-09-14 13:49:00.057]
[2025-09-14 13:49:00.057] [hl7593_read_interface] val=0xD4
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [0x0]=0xD4 [hl7593_read_interface] Reg[1]=0xD4
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_read_interface] val=0xD4
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [0x1]=0xD4 [hl7593_read_interface] Reg[2]=0x83
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_read_interface] val=0x83
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [0x2]=0x83 [hl7593_read_interface] Reg[3]=0xA8
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_read_interface] val=0xA8
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [0x3]=0xA8 [hl7593_read_interface] Reg[4]=0x1
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_read_interface] val=0x1
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [0x4]=0x1 [hl7593_read_interface] Reg[5]=0x81
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_read_interface] val=0x81
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [0x5]=0x81 [hl7593_driver_probe] PL g_hl7593_0_hw_exist=1, g_hl7593_driver_ready=1
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_read_interface] Reg[3]=0xA8
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_read_interface] val=0xA8
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_read_interface] Reg[4]=0x1
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_read_interface] val=0x1
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_read_interface] Reg[5]=0x81
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_read_interface] val=0x1
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] PGOOD = 1, chip_id = 43009
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_hw_component_detect] exist = 1, Chip ID = A801
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] hl7593_vddq_hw_init
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_read_interface] Reg[0]=0x80
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_read_interface] val=0x80
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [0x0]=0x80 [hl7593_read_interface] Reg[1]=0x80
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.072] [hl7593_read_interface] val=0x80
[2025-09-14 13:49:00.072]
[2025-09-14 13:49:00.089] [0x1]=0x80 [hl7593_read_interface] Reg[2]=0x83
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [hl7593_read_interface] val=0x83
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [0x2]=0x83 [hl7593_read_interface] Reg[3]=0xA8
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [hl7593_read_interface] val=0xA8
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [0x3]=0xA8 [hl7593_read_interface] Reg[4]=0x1
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [hl7593_read_interface] val=0x1
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [0x4]=0x1 [hl7593_read_interface] Reg[5]=0x81
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [hl7593_read_interface] val=0x81
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [0x5]=0x81 [hl7593_driver_probe] PL g_hl7593_1_hw_exist=1, g_hl7593_driver_ready=1
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [hl7593_set_voltage] id = 0, set_val = 1125000
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [hl7593_read_interface] Reg[0]=0xD4
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [hl7593_read_interface] val=0x54
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [hl7593_get_voltage] id = 0, get_val = 1125000
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] hl7593_vdd2=1125000 uV
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [hl7593_read_interface] Reg[1]=0x80
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [hl7593_read_interface] val=0x0
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [hl7593_get_voltage] id = 1, get_val = 600000
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] hl7593_vddq=600000 uV
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [fan53526_driver_probe]
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [I2C] 365: id=3,addr: 60, transfer error
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [I2C] 371: I2C_ACKERR
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [I2C] 235: I2C structure:
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [I2C] Clk=24960,Id=3,Mode=1,St_rs=0,Dma_en=0,Op=3,Poll_en=1,Irq_stat=2
[2025-09-14 13:49:00.089]
[2025-09-14 13:49:00.089] [I2C] Trans_len=1,Trans_num=2,Trans_auxlen=1,Data_size=FFFF,speed=100
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] 238: base address 0x1100F000
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] 259: I2C register:
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] SLAVE_ADDR=C0,INTR_MASK=1F8,INTR_STAT=3,CONTROL=38,TRANSFER_LEN=1
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] TRANSAC_LEN=2,DELAY_LEN=A,TIMING=418,LTIMING=118,START=2,FIFO_STAT=1
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] IO_CONFIG=1A3,HS=0,DEBUGSTAT=0,EXT_CONF=8001,TRANSFER_LEN_AUX=1,CLOCK_DIV=4
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] 924: write_read 0x10001 bytes fails,ret=-121.
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] 365: id=3,addr: 60, transfer error
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] 371: I2C_ACKERR
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] 235: I2C structure:
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] Clk=24960,Id=3,Mode=1,St_rs=0,Dma_en=0,Op=3,Poll_en=1,Irq_stat=2
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] Trans_len=1,Trans_num=2,Trans_auxlen=1,Data_size=FFFF,speed=100
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] 238: base address 0x1100F000
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] 259: I2C register:
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] SLAVE_ADDR=C0,INTR_MASK=1F8,INTR_STAT=3,CONTROL=38,TRANSFER_LEN=1
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] TRANSAC_LEN=2,DELAY_LEN=A,TIMING=418,LTIMING=118,START=2,FIFO_STAT=1
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] IO_CONFIG=1A3,HS=0,DEBUGSTAT=0,EXT_CONF=8001,TRANSFER_LEN_AUX=1,CLOCK_DIV=4
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] 924: write_read 0x10001 bytes fails,ret=-121.
[2025-09-14 13:49:00.104]
[2025-09-14 13:49:00.104] [I2C] 365: id=3,addr: 60, transfer error
[2025-09-14 13:49:00.120]
[2025-09-14 13:49:00.120] [I2C] 371: I2C_ACKERR
[2025-09-14 13:49:00.120]
[2025-09-14 13:49:00.120] [I2C] 235: I2C structure:
[2025-09-14 13:49:00.120]
[2025-09-14 13:49:00.120] [I2C] Clk=24960,Id=3,Mode=1,St_rs=0,Dma_en=0,Op=3,Poll_en=1,Irq_stat=2
[2025-09-14 13:49:00.120]
[2025-09-14 13:49:00.120] [I2C] Trans_len=1,Trans_num=2,Trans_auxlen=1,Data_size=FFFF,speed=100
[2025-09-14 13:49:00.120]
[2025-09-14 13:49:00.120] [I2C] 238: base address 0x1100F000
[2025-09-14 13:49:00.120]
[2025-09-14 13:49:00.120] [I2C] 259: I2C register:
[2025-09-14 13:49:00.120]
[2025-09-14 13:49:00.120] [I2C] SLAVE_ADDR=C0,INTR_MASK=1F8,INTR_STAT=3,CONTROL=38,TRANSFER_LEN=1
[2025-09-14 13:49:00.120]
[2025-09-14 13:49:00.120] [I2C] TRANSAC_LEN=2,DELAY_LEN=A,TIMING=418,LTIMING=118,START=2,FIFO_STAT=1
[2025-09-14 13:49:00.120]
[2025-09-14 13:49:00.120] [I2C] IO_CONFIG=1A3,HS=0,DEBUGSTAT=0,EXT_CONF=8001,TRANSFER_LEN_AUX=1,CLOCK_DIV=4
[2025-09-14 13:49:00.121]
[2025-09-14 13:49:00.121] [I2C] 924: write_read 0x10001 bytes fails,ret=-121.
[2025-09-14 13:49:00.121]
[2025-09-14 13:49:00.121] [fan53526_hw_component_detect] exist = 0, Chip ID = 304
[2025-09-14 13:49:00.121]
[2025-09-14 13:49:00.121] [fan53526_driver_probe] PL fan53526_vdd2 is not exist
[2025-09-14 13:49:00.121]
[2025-09-14 13:49:00.121] [fan53526_hw_component_detect] exist = 0, Chip ID = A801
[2025-09-14 13:49:00.121]
[2025-09-14 13:49:00.121] [fan53526_driver_probe] PL fan53526_vddq is not exist
[2025-09-14 13:49:00.121]
[2025-09-14 13:49:00.121] register vs1 OK
[2025-09-14 13:49:00.121]
[2025-09-14 13:49:00.121] register vmodem OK
[2025-09-14 13:49:00.121]
[2025-09-14 13:49:00.121] register vcore OK
[2025-09-14 13:49:00.121]
[2025-09-14 13:49:00.121] register vproc OK
[2025-09-14 13:49:00.121]
[2025-09-14 13:49:00.121] register vpa OK
[2025-09-14 13:49:00.121]
[2025-09-14 13:49:00.121] register vsram_others OK
[2025-09-14 13:49:00.121]
[2025-09-14 13:49:00.121] register vsram_proc OK
[2025-09-14 13:49:00.121]
[2025-09-14 13:49:00.121] register vdram OK
[2025-09-14 13:49:00.121]
[2025-09-14 13:49:00.121] [PMIC]Init done
[2025-09-14 13:49:00.136]
[2025-09-14 13:49:00.137] [SD0] Host controller intialization start
[2025-09-14 13:49:00.137]
[2025-09-14 13:49:00.137] [SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) DIV(385) DS(0) RS(0)
[2025-09-14 13:49:00.137]
[2025-09-14 13:49:00.137] [SD0] Host controller intialization done
[2025-09-14 13:49:00.137]
[2025-09-14 13:49:00.137] [mmc_init]: msdc0 start mmc_init_card()
[2025-09-14 13:49:00.137]
[2025-09-14 13:49:00.137] [mmc_init_card]: start
[2025-09-14 13:49:00.137]
[2025-09-14 13:49:00.289] [SD0] EXT_CSD_ERASE_GRP_DEF is Off, wp_size = 8192KB
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] [SD0] csd.write_prot_grpsz = 15, csd.erase_sctsz = 1024
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] [SD0] Switch to High-Speed mode!
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] [SD0] Switch to DDR buswidth
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] [SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(2) DDR(1) DIV(192) DS(0) RS(0)
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] [SD0] Size: 7296 MB, Max.Speed: 52000 kHz, blklen(512), nblks(14942208)
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] [SD0] Initialized, eMMC45
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] [SD0] SET_CLK(52000kHz): SCLK(50000kHz) MODE(2) DDR(1) DIV(1) DS(0) RS(0)
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] [mmc_init_card]: finish successfully
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] [PLFM] Init Boot Device: OK(0)
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] [PLFM] Init PWRAP: OK(0)
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] [PLFM] Init PMIC: OK(0)
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] [PLFM] chip_hw_ver[CA01], chip_sw_ver[1]
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] [BLDR] Build Time: 20230323-154644
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 0 0
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=1 1 1 1 1 1 1
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.289] clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0
[2025-09-14 13:49:00.289]
[2025-09-14 13:49:00.290] clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]enable_dcxo first con = 0x486, osc32con = 0xDE72, sec = 0x2544
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]get_frequency_meter: input=0x0, ouput=5
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]get_frequency_meter: input=0x0, ouput=0
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]get_frequency_meter: input=0x0, ouput=0
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]get_frequency_meter: input=0x0, ouput=5
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]get_frequency_meter: input=0x0, ouput=3942
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]rtc_init#1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]bbpu = 0x1, con = 0x486, osc32con = 0xDE72, sec = 0x2544, yea = 0xC102
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]rtc_init#2 powerkey1 = 0xA357, powerkey2 = 0x67D2
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]rtc_init Writeif_unlock
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]switch to dcxo
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]eosc_cali: RG_FQMTR_CKSEL=0x42
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]get_frequency_meter: input=0xF, ouput=726
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]eosc_cali: val=0x2D6
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]get_frequency_meter: input=0x17, ouput=893
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]eosc_cali: val=0x37D
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]get_frequency_meter: input=0x13, ouput=810
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]eosc_cali: val=0x32A
[2025-09-14 13:49:00.321]
[2025-09-14 13:49:00.321] [RTC]get_frequency_meter: input=0x11, ouput=767
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [RTC]eosc_cali: val=0x2FF
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [RTC]get_frequency_meter: input=0x12, ouput=789
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [RTC]eosc_cali: val=0x315
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [RTC]get_frequency_meter: input=0x12, ouput=788
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [RTC]get_frequency_meter: input=0x13, ouput=809
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [RTC]EOSC cali val = 0xDE52
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [RTC]RTC_SPAR0=0x0
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [RTC]XO_XMODE_M = 1 , XO_EN32K_M = 1
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [RTC]32k-less mode
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [RTC]rtc_2sec_reboot_check 0x2544, without 2sec reboot, type 0x2
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [RTC]rtc_2sec_stat_clear
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [RTC]rtc_lpd_init RTC_CON=0x486
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [PMIC] pmic_init_setting end. v180413
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [MT6357] 1 6,61
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [MT6357] 1 2,45
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [MT6357] 1 1,48
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [MT6357] get volt 5, 61, 900000
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] vsram_others = 900000 uV
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [MT6357] get volt 3, 45, 800000
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] vproc = 800000 uV
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [MT6357] get volt 6, 61, 900000
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] vsram_proc = 900000 uV
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [MT6357] get volt 2, 45, 800000
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] vcore = 800000 uV
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [MT6357] get volt 1, 48, 800000
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] vmodem = 800000 uV
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [MT6357] 2 6,1
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [MT6357] 2 5,1
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [MT6357] 2 3,1
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [MT6357] 2 2,1
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [MT6357] 2 1,1
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [RGU] EMI_DCS_SUCCESS 0
[2025-09-14 13:49:00.351]
[2025-09-14 13:49:00.351] [RGU] DVFSRC_SUCCESS 0
[2025-09-14 13:49:00.368]
[2025-09-14 13:49:00.368] [DDR Reserve] ddr reserve mode not be enabled yet
[2025-09-14 13:49:00.368]
[2025-09-14 13:49:00.368] [RGU] mtk_wdt_mode_config mode value=30, tmp:22000030
[2025-09-14 13:49:00.368]
[2025-09-14 13:49:00.368] [RGU] mtk_wdt_mode_config mode value=7D, tmp:2200007D
[2025-09-14 13:49:00.368]
[2025-09-14 13:49:00.368] [RGU] g_rgu_status: 2 (0x2)
[2025-09-14 13:49:00.368]
[2025-09-14 13:49:00.368] [RGU] bypass pwrkey: set
[2025-09-14 13:49:00.368]
[2025-09-14 13:49:00.368] Enter mtk_kpd_gpio_set!
[2025-09-14 13:49:00.368]
[2025-09-14 13:49:00.368] after set KP enable: KP_SEL = 0x1C70 !
[2025-09-14 13:49:00.368]
[2025-09-14 13:49:00.368] [RTC]irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x80, spar1 = 0x800
[2025-09-14 13:49:00.368]
[2025-09-14 13:49:00.368] [RTC]new_spare0 = 0xE000, new_spare1 = 0x5001, new_spare2 = 0x1, new_spare3 = 0x1
[2025-09-14 13:49:00.368]
[2025-09-14 13:49:00.368] [RTC]bbpu = 0x1, con = 0x486, cali = 0x2544, osc32con = 0xDE72
[2025-09-14 13:49:00.368]
[2025-09-14 13:49:00.368] pmic_reboot: 0!
[2025-09-14 13:49:00.368]
[2025-09-14 13:49:00.368] [PLFM] WDT reboot bypass power key!
[2025-09-14 13:49:00.368]
[2025-09-14 13:49:00.368] [PMIC]POWER_HOLD :0x1
[2025-09-14 13:49:00.368]
[2025-09-14 13:49:00.368] [RTC]rtc_lpsd_solution 解析一下这段日志