arm64汇编学习- （4）比较跳转指令1

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已于 2023-03-28 23:32:18 修改 · 2.2k 阅读

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#arm64汇编学习 #（4）比较跳转指令 #比较跳转指令

于 2023-03-27 23:14:49 首次发布

本文详细介绍了ARM64架构中用于比较和跳转的汇编指令，包括CMP和CMN系列（如CMP(extendedregister)，CMP(immediate)等），它们更新条件标志并丢弃结果。同时讲解了条件选择指令如csel，CSET和CSINC的工作原理，并提供了测试代码示例来帮助理解这些指令的使用和效果。

arm64汇编学习- （4）比较跳转指令1

1 比较指令
2 条件选择指令

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1 比较指令

1.1 CMP (extended register)

Compare (extended register) subtracts a sign or zero-extended register value, followed by an optional left shift amount, from a register value. The argument that is extended from the register can be a byte, halfword, word, or doubleword. It updates the condition flags based on the result, and discards the result.
This instruction is an alias of the SUBS (extended register) instruction. This means that:
• The encodings in this description are named to match the encodings of SUBS (extended register).
• The description of SUBS (extended register) gives the operational pseudocode for this instruction.
在这里插入图片描述

1.2 CMP (immediate)

Compare (immediate) subtracts an optionally-shifted immediate value from a register value. It updates the condition flags based on the result, and discards the result.
This instruction is an alias of the SUBS (immediate) instruction. This means that:
• The encodings in this description are named to match the encodings of SUBS (immediate).
• The description of SUBS (immediate) gives the operational pseudocode for this instruction.
在这里插入图片描述

1.3 CMP (shifted register)

Compare (shifted register) subtracts an optionally-shifted register value from a register value. It updates the condition flags based on the result, and discards the result.
This instruction is an alias of the SUBS (shifted register) instruction. This means that:
• The encodings in this description are named to match the encodings of SUBS (shifted register).
• The description of SUBS (shifted register) gives the operational pseudocode fo