ARMv8-A系列学习笔记(8)--Chapter 10 AArch64 Exception Handling

Chapter 10

AArch64 Exception Handling

EXCEPTION的分类：

1. INTERRUPTS

IRQ and FIQ

associated with input pins on the core

asynchronous

2. ABORTS

INSTRUCTION ABORTS or DATA ABORTS

error response on a memory access

can be generated by the MMU <---- why?

Instruction aborts: when core tries to execute it, before the instruction executes

Data aborts: result of load or store instruction, happen after data read or write has been attempted

synchronous

3. RESET

special vector for the highest implemented Exception level

4. EXCEPTION GENERATING INSTRUCTIONS

SUPERVISOR CALL -- SVC -- enables User mode programs to request an OS service

HYPERVISOR CALL -- HVC -- enables the guest OS to request hypervisor services

SECURE MONITOR CALL -- SMC -- enables the Normal world to request Secure world services

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Exception levels的切换，只能通过异常（进入，或者退出的时候）

当从高级别向低级别的时候，EXECUTION STATE可以相同，或者从AARCH64 TO AARCH32

相反， 低到高，EXECUTION STATE可以相同，或者从AARCH32 TO AARCH64

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before exception handler

PC --> ELR_ELn

PSTATE --> SPSR_ELn

after exception handler

ELR_ELn --> PC

SPSR_ELn --> PSTATE

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