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sdi_tx_bridge
SDI to Video Bridges
Quickly bridge SDI inputs and outputs to video and synchronization signals that can then be used with the Xilinx video to/from AXI4-Stream cores
The LogiCORE? IP SDI Tx and RX Video Bridge cores are designed to interface the SDI ports of the SMPTE SDI core to the video ports of the AXI4-Stream core. The input of the SDI Rx Video Bridge is an SDI virtual interface that has one to four 10-bit data streams with embedded synchronization. The output is video data with explicit synchronization signals. This core extracts synchronization signals, reformats the video data, and provides clock enables. The input of the SDI TX Video Bridge core is Video data with explicit synchronization signals. The output is an SDI virtual interface with one to four 10-bit data streams and embedded synchronization.
Key Features
?Embeds and extracts synchronization signals into and out of the SDI data stream.
?Creates and embeds line numbers into the SDI data stream.
?Generates clock enables for SDI-SDI and 3G-SDI level B modes.
?Supports YCbCr data format at 10-bits per component.
?Supports SD-SDI, HD-SDI, 3G-SDI Level A, and 3G-SDI Level B.
?Re-orders sequential video data to parallel data in 3G Level B and vice versa.
?Supports interlaced and progressive line standards. Embeds and extracts synchronization signals into and out of the SDI data stream.
sdi_rx_vid_bridge
Quickly bridge SDI inputs and outputs to video and synchronization signals that can then be used with the Xilinx video to/from AXI4-Stream cores
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