HAPS enablement summarization

1. DDR is the most important component for complication so that the configuration and test coverage should be considered.

config:  controller/DFI/phy

timing, rank and capablity

test coverage:  cachability (inner cachable/outter cachable), bitwidth, cached size (l2/l3), write back/write through, wb always failed on eviction if cache is full, 1 or 2 or 4 ranks, lock (spinlock), mmu enable/disable, page table init and allocation.

2.