OC_类、description方法、SEL

Objective-C 类与方法实现
本文深入探讨Objective-C中的类实现细节,包括类加载过程、初始化流程、description方法的使用及SEL类型的对象创建方式。此外,还介绍了类与对象如何调用description方法,并解释了方法的存储位置和SEL类型的定义。

1.类:

     类的本质:类也是class类型的对象

             typedef struct objc_class  * Class;

             每个类只有一个类对象;

     

     

        1.当程序启动时,就会加载项目中所有的类和分类,而且加载后会调用每个类的+load方法;

        2.当第一次使用某个类的时候,会调用当前类的+initialize方法;

        3.先加载父类,再加载子类(先调用父类的+load方法,再调用子类的+load方法);

          先初始化父类,再初始化子类(先调用父类的+initialize方法,再调用子类的+initialize方法,initialize在第一次使用时加载);

        4.分类方法如果有+initialize方法,不会调用原来类的+initialize方法了;


2.description方法:


//类调用+description方法
+(NSString *)description{
    return @"Abc";
}

//对象调用+description方法
-(NSString *)description{
    //打印自身会引发死循环
    //NSLog(@"%@",self);
    return [NSString stringWithFormat:@"...."];
}


3.SEL:

     1.方法的存储位置:

       每个类的方法列表都存储在类对象中

       每个方法都有与之对应的SEL类型的对象

       根据一个SEL对象就可以找到方法的地址,进而调用方法

     2.SEL类型的定义:

       typedef struct objc_selector  * SEL;

     3.SEL对象的创建:

        SEL s = @selector(test)

        SEL s2 = NSSelectorFromString(@"test");


     _cmd == @selector(test)

     

     -(void)test{

     //_cmd代表当前方法

     [self performSelector:_cmd];//会引发死循环

     }



//########################################################################### // // FILE: F2806x_PieVect.h // // TITLE: F2806x Devices PIE Vector Table Definitions. // //########################################################################### // $TI Release: F2806x C/C++ Header Files and Peripheral Examples V136 $ // $Release Date: Apr 15, 2013 $ //########################################################################### #ifndef F2806x_PIE_VECT_H #define F2806x_PIE_VECT_H #ifdef __cplusplus extern "C" { #endif //--------------------------------------------------------------------------- // PIE Interrupt Vector Table Definition: // // Create a user type called PINT (pointer to interrupt): typedef interrupt void(*PINT)(void); // Define Vector Table: struct PIE_VECT_TABLE { // Reset is never fetched from this table. // It will always be fetched from 0x3FFFC0 in // boot ROM PINT PIE1_RESERVED; PINT PIE2_RESERVED; PINT PIE3_RESERVED; PINT PIE4_RESERVED; PINT PIE5_RESERVED; PINT PIE6_RESERVED; PINT PIE7_RESERVED; PINT PIE8_RESERVED; PINT PIE9_RESERVED; PINT PIE10_RESERVED; PINT PIE11_RESERVED; PINT PIE12_RESERVED; PINT PIE13_RESERVED; // Non-Peripheral Interrupts: PINT TINT1; // CPU-Timer1 PINT TINT2; // CPU-Timer2 PINT DATALOG; // Datalogging interrupt PINT RTOSINT; // RTOS interrupt PINT EMUINT; // Emulation interrupt PINT NMI; // Non-maskable interrupt PINT ILLEGAL; // Illegal operation TRAP PINT USER1; // User Defined trap 1 PINT USER2; // User Defined trap 2 PINT USER3; // User Defined trap 3 PINT USER4; // User Defined trap 4 PINT USER5; // User Defined trap 5 PINT USER6; // User Defined trap 6 PINT USER7; // User Defined trap 7 PINT USER8; // User Defined trap 8 PINT USER9; // User Defined trap 9 PINT USER10; // User Defined trap 10 PINT USER11; // User Defined trap 11 PINT USER12; // User Defined trap 12 // Group 1 PIE Peripheral Vectors: PINT ADCINT1; // ADC - if Group 10 ADCINT1 is enabled, this must be rsvd1_1 PINT ADCINT2; // ADC - if Group 10 ADCINT2 is enabled, this must be rsvd1_2 PINT rsvd1_3; PINT XINT1; // External Interrupt 1 PINT XINT2; // External Interrupt 2 PINT ADCINT9; // ADC 9 PINT TINT0; // Timer 0 PINT WAKEINT; // WD // Group 2 PIE Peripheral Vectors: PINT EPWM1_TZINT; // EPWM-1 PINT EPWM2_TZINT; // EPWM-2 PINT EPWM3_TZINT; // EPWM-3 PINT EPWM4_TZINT; // EPWM-4 PINT EPWM5_TZINT; // EPWM-5 PINT EPWM6_TZINT; // EPWM-6 PINT EPWM7_TZINT; // EPWM-7 PINT EPWM8_TZINT; // EPWM-8 // Group 3 PIE Peripheral Vectors: PINT EPWM1_INT; // EPWM-1 PINT EPWM2_INT; // EPWM-2 PINT EPWM3_INT; // EPWM-3 PINT EPWM4_INT; // EPWM-4 PINT EPWM5_INT; // EPWM-5 PINT EPWM6_INT; // EPWM-6 PINT EPWM7_INT; // EPWM-7 PINT EPWM8_INT; // EPWM-8 // Group 4 PIE Peripheral Vectors: PINT ECAP1_INT; // ECAP-1 PINT ECAP2_INT; // ECAP-2 PINT ECAP3_INT; // ECAP-3 PINT rsvd4_4; PINT rsvd4_5; PINT rsvd4_6; PINT HRCAP1_INT; // HRCAP-1 PINT HRCAP2_INT; // HRCAP-2 // Group 5 PIE Peripheral Vectors: PINT EQEP1_INT; // EQEP-1 PINT EQEP2_INT; // EQEP-2 PINT rsvd5_3; PINT HRCAP3_INT; // HRCAP-3 PINT HRCAP4_INT; // HRCAP-4 PINT rsvd5_6; PINT rsvd5_7; PINT USB0_INT; // USB-0 // Group 6 PIE Peripheral Vectors: PINT SPIRXINTA; // SPI-A PINT SPITXINTA; // SPI-A PINT SPIRXINTB; // SPI-B PINT SPITXINTB; // SPI-B PINT MRINTA; // McBSP-A PINT MXINTA; // McBSP-A PINT rsvd6_7; PINT rsvd6_8; // Group 7 PIE Peripheral Vectors: PINT DINTCH1; // DMA CH1 PINT DINTCH2; // DMA CH2 PINT DINTCH3; // DMA CH3 PINT DINTCH4; // DMA CH4 PINT DINTCH5; // DMA CH5 PINT DINTCH6; // DMA CH6 PINT rsvd7_7; PINT rsvd7_8; // Group 8 PIE Peripheral Vectors: PINT I2CINT1A; // I2C-A PINT I2CINT2A; // I2C-A PINT rsvd8_3; PINT rsvd8_4; PINT rsvd8_5; PINT rsvd8_6; PINT rsvd8_7; PINT rsvd8_8; // Group 9 PIE Peripheral Vectors: PINT SCIRXINTA; // SCI-A PINT SCITXINTA; // SCI-A PINT SCIRXINTB; // SCI-B PINT SCITXINTB; // SCI-B PINT ECAN0INTA; // eCAN-A PINT ECAN1INTA; // eCAN-A PINT rsvd9_7; PINT rsvd9_8; // Group 10 PIE Peripheral Vectors: PINT rsvd10_1; // Can be ADCINT1, but must make ADCINT1 in Group 1 space "reserved". PINT rsvd10_2; // Can be ADCINT2, but must make ADCINT2 in Group 1 space "reserved". PINT ADCINT3; // ADC PINT ADCINT4; // ADC PINT ADCINT5; // ADC PINT ADCINT6; // ADC PINT ADCINT7; // ADC PINT ADCINT8; // ADC // Group 11 PIE Peripheral Vectors: PINT CLA1_INT1; // CLA PINT CLA1_INT2; // CLA PINT CLA1_INT3; // CLA PINT CLA1_INT4; // CLA PINT CLA1_INT5; // CLA PINT CLA1_INT6; // CLA PINT CLA1_INT7; // CLA PINT CLA1_INT8; // CLA // Group 12 PIE Peripheral Vectors: PINT XINT3; PINT rsvd12_2; PINT rsvd12_3; PINT rsvd12_4; PINT rsvd12_5; PINT rsvd12_6; PINT LVF; // Latched overflow PINT LUF; // Latched underflow }; //--------------------------------------------------------------------------- // PIE Interrupt Vector Table External References & Function Declarations: // extern struct PIE_VECT_TABLE PieVectTable; #ifdef __cplusplus } #endif /* extern "C" */ #endif // end of F2806x_PIE_VECT_H definition //=========================================================================== // End of file. //=========================================================================== /*===================================================================================== File name: sysInit.c Originator: Motor Control Systems Group Description: ===================================================================================== History: ------------------------------------------------------------------------------------- 04-15-2005 Version 3.20 -------------------------------------------------------------------------------------*/ #ifndef _SYSINIT_C #define _SYSINIT_C #include "pmsmahf.h" // These are defined by the linker (see F2812.cmd) extern Uint16 RamfuncsLoadStart; extern Uint16 RamfuncsLoadEnd; extern Uint16 RamfuncsRunStart; /*=====================================================================================*/ /**/ /*=====================================================================================*/ void fun_sysInit() { // ****************************************** // Initialization code for DSP_TARGET = F2812 // ****************************************** // Initialize System Control registers, PLL, WatchDog, Clocks to default state: // This function is found in the DSP281x_SysCtrl.c file. InitSysCtrl(); /* // Globally synchronize all ePWM modules to the time base clock (TBCLK) EALLOW; SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1; EDIS; // HISPCP prescale register settings, normally it will be set to default values EALLOW; // This is needed to write to EALLOW protected registers SysCtrlRegs.HISPCP.all = 0x0000; // SYSCLKOUT/1 EDIS; // This is needed to disable write to EALLOW protected registers */ // Disable and clear all CPU interrupts: DINT; IER = 0x0000; IFR = 0x0000; // Initialize Pie Control Registers To Default State: // This function is found in the DSP281x_PieCtrl.c file. InitPieCtrl(); // Initialize the PIE Vector Table To a Known State: // This function is found in DSP281x_PieVect.c. // This function populates the PIE vector table with pointers // to the shell ISR functions found in DSP281x_DefaultIsr.c. InitPieVectTable(); // Copy time critical code and Flash setup code to RAM // This includes the following ISR functions: EvaTimer1(), EvaTimer2() // EvbTimer3 and and InitFlash(); // The RamfuncsLoadStart, RamfuncsLoadEnd, and RamfuncsRunStart // symbols are created by the linker. Refer to the F2812.cmd file. MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart); // Call Flash Initialization to setup flash waitstates // This function must reside in RAM InitFlash(); // User specific functions, Reassign vectors (optional), Enable Interrupts: // Waiting for enable flag set // Enable CNT_zero interrupt using EPWM1 Time-base EALLOW; // This is needed to write to EALLOW protected registers EPwm1Regs.ETSEL.bit.INTEN = 1; // Enable EPWM1INT generation EPwm1Regs.ETSEL.bit.INTSEL = 1; // Enable interrupt CNT_zero event EPwm1Regs.ETPS.bit.INTPRD = 1; // Generate interrupt on the 1st event EPwm1Regs.ETCLR.bit.INT = 1; // Enable more interrupts #if HD_PHASE_OC_SOURCE==HD_PHASE_OC_HARDWARE EPwm1Regs.TZEINT.bit.OST = 1; // Enable EPWM1_TZINT generation #else EPwm1Regs.TZEINT.bit.OST = 0; // Disable EPWM1_TZINT generation #endif EPwm1Regs.TZCLR.bit.OST = 1; // Enable more interrupts EPwm1Regs.TZCLR.bit.CBC = 1; // Enable more interrupts EPwm1Regs.TZCLR.bit.INT = 1; // Enable more interrupts EDIS; // This is needed to disable write to EALLOW protected registers // Reassign ISRs. // Reassign the PIE vector for T1UFINT and CAP3INT to point to a different // ISR then the shell routine found in DSP281x_DefaultIsr.c. // This is done if the user does not want to use the shell ISR routine // but instead wants to use their own ISR. EALLOW; // This is needed to write to EALLOW protected registers PieVectTable.EPWM1_INT = &MainISR; #if HD_PHASE_OC_SOURCE==HD_PHASE_OC_HARDWARE PieVectTable.EPWM1_TZINT = &PdpintISR; #endif EDIS; // This is needed to disable write to EALLOW protected registers // Enable PIE group 3 interrupt 1 for EPWM1_INT PieCtrlRegs.PIEIER3.all = M_INT1; // Enable PIE group 2 interrupt 1 for EPWM1_TZINT PieCtrlRegs.PIEIER2.all = M_INT1; // Enable CPU INT3 for EPWM1_INT: IER |= (M_INT2 | M_INT3); // Initialize scia: /*#if PRODUCT_TYPE_ID==PRODUCT_TYPE_DRIVER_HZ gpioReg.init_HC(&gpioReg); #else*/ gpioReg.init(&gpioReg); //#endif sciCom1.LspClk = ((Uint32)SYSTEM_FREQUENCY*1000000/4); sciCom1.ComNo = SCI_COM1;//usb sciCom1.BaudRate = 9600; sciCom1.init(&sciCom1); // sciCom2.LspClk = ((Uint32)SYSTEM_FREQUENCY*1000000/4); // sciCom2.ComNo = SCI_COM2;//485 // sciCom2.BaudRate = 19200; // sciCom2.init(&sciCom2); fun_errorInit(); fun_ioSignalInit(); fun_dbCtrlInit(); fun_adInit(); fun_eepromInit(); fun_saveRomInit(); ////////////////// fun_machineLockInit(); fun_intfDataInit(); fun_internParaInit(); fun_timerInit(); // fun_masterEncInit(); fun_fanCtrl_init(); fun_sysCtrlInit(); fun_motorDriveInit(); fun_MODBUS_Init(&sciCom1); fun_overLoadInit(); fun_mtAngleOriginInit(); fun_mtoffsetTestInit(); // fun_mtoffsetTestHallInit(); fun_mtAngleInit(); fun_mtCtrlModInit(); fun_dataLogInit(); fun_trqSeltInit(); fun_spdSeltInit(); fun_posSeltInit(); fun_udcSeltInit(); fun_posGenInit(); fun_speedInit(); // fun_appCtrlEMPInit(); fun_mtCtrl_fsm_Init(); fun_appCtrlInit(); fun_runLedInit(); // fun_mtDriveOnInit(); fun_chargCtrlInit(); // fun_appCompInit(); // fun_appDensityInit(); fun_tmpMd_Init(); // fun_appTsn_init(); fun_ad_offsetCheck(); // encoder_para_init(); fun_appCtrl_fsm_Init(); fun_appCtrl_fsm_para_Init(); DI_init(); DI_para_init(); DO_led_init(); DO_init(); encoder_para_init(); //必须在fun_mtEnc_init()之后 error_init_withoutEeprom(); error_init_withEeprom(); production_init(); weftSens_init(); weftSens_para_init(); fun_phaseLackInit(); // fun_testParInit(); fun_fuzzyPIDInit(); // EvaRegs.T1CON.bit.TENABLE = 1; // Enable global Interrupts and higher priority real-time debug events: EnableDog(); EINT; // Enable Global interrupt INTM ERTM; // Enable Global realtime interrupt DBGM } #endif 为什么会触发PdpintISR()这个中断函数
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