Avalon-MM Clock Crossing Bridge

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最新推荐文章于 2024-08-05 15:19:47 发布

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Avalon-MM时钟交叉桥用于在不同时钟域间传递Avalon-MM命令及响应，也可用于桥接不同时钟域的AXI主机与从机。通过异步FIFO实现时钟域间的转换逻辑，可通过设置参数调整主机与时钟域中FIFO的深度。

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Avalon-MM Clock Crossing Bridge
The Avalon-MM Clock Crossing Bridge transfers Avalon-MM commands and responses between different
clock domains. You can also use the Avalon-MM Clock Crossing Bridge to bridge between AXI masters and
slaves of different clock domains.
The Avalon-MM Clock Crossing Bridge uses asynchronous FIFOs to implement the clock crossing logic.
The Clock Crossing Bridge has a number of parameters, including parameters to control the depth of the
command and response FIFOs in both the master and slave clock domains. If the number of in-flight reads
exceeds the depth of the response FIFO, the Clock Crossing Bridge stops sending reads. To maintain
throughput for high-performance applications, increase the response FIFO depth from the default minimum
depth, which is twice the maximum burst size