Wed Jun 25, 2025 16:11:53: : IAR Embedded Workbench 9.40.1 (armPROC.dll)
Wed Jun 25, 2025 16:11:53: : Loaded macro file: C:\iar\arm/config/debugger/Infineon/CYT2BL_M4.dmac
Wed Jun 25, 2025 16:11:53: : Loaded macro file: C:\iar\arm/config/debugger/Infineon/CYTVII_M4.dmac
Wed Jun 25, 2025 16:11:53: : Loaded macro file: C:\iar\arm/config/debugger/Infineon/CYTVII_Trace.dmac
Wed Jun 25, 2025 16:11:53: : Loaded macro file: C:\iar\arm/config/debugger/Infineon/CYTVII_Common.dmac
Wed Jun 25, 2025 16:11:54: : Loaded macro file: C:\iar\arm/config/flashloader/Infineon/FlashTVII.mac
Wed Jun 25, 2025 16:11:54: : Loading the CMSIS-DAP driver
Wed Jun 25, 2025 16:11:54: : Probe: CMSIS-DAP probe SW module ver 1.24
Wed Jun 25, 2025 16:11:54: : Probe: Connecting to ZF-WLFS-CMSIS-DAP:80940860-DC5475E17B3C firmware v.2.1.1
Wed Jun 25, 2025 16:11:54: : Emulation layer version 5.21
Wed Jun 25, 2025 16:11:54: : Notification to core-connect hookup.
Wed Jun 25, 2025 16:11:54: : Connected DAP v2 on SWD. Detected DP ID=0x6ba02477.
Wed Jun 25, 2025 16:11:54: : Connecting to TAP#0 DAP AHB-AP-CM port 0x2 (IDR=0x2477'0011).
Wed Jun 25, 2025 16:11:54: : Recognized CPUID=0x410fc241 Cortex-M4 r0p1 arch ARMv7-M
Wed Jun 25, 2025 16:11:54: : Debug resources: 6 instruction comparators, 4 data watchpoints.
Wed Jun 25, 2025 16:11:54: : DMAC: Family ID: 0x108, Series: CYT2BL, Major.Minor Rev.: 1.1, Silicon ID: 0xea02
Wed Jun 25, 2025 16:11:54: : DMAC: FlashBoot Ver.: 3.1.0.556, TOC2 Flags: 0x243, Protection: NORMAL
Wed Jun 25, 2025 16:11:54: : LowLevelReset(script, delay 200)
Wed Jun 25, 2025 16:11:54: : Calling reset script: Traveo2_CM4_ResetAndAcquireDevice
Wed Jun 25, 2025 16:11:54: : DMAC: Performing a hardware reset and entering test mode ...
Wed Jun 25, 2025 16:11:54: : DMAC: Device has successfully entered test mode.
Wed Jun 25, 2025 16:11:54: : DMAC: The power mode of Cortex-M4 core was set to ENABLED.
Wed Jun 25, 2025 16:11:54: : Loaded debugee: C:\iar\arm/config/flashloader/Infineon/FlashTVIIBE_128K.out
Wed Jun 25, 2025 16:11:55: : Target reset
Wed Jun 25, 2025 16:11:55: : Unloaded macro file: C:\iar\arm/config/flashloader/Infineon/FlashTVII.mac
Wed Jun 25, 2025 16:11:55: : Downloaded C:\Users\zhang\Desktop\CYT2BL3_Brushless_Driver_Project-master\Seekfree_CYT2BL3_Double_Foc_Project\project\iar\Debug_m4\Exe\cyt2bl3.out to flash memory.
Wed Jun 25, 2025 16:11:55: : 104902 bytes downloaded into FLASH (53.30 Kbytes/sec)
Wed Jun 25, 2025 16:11:55: : DMAC: Performing a hardware reset and entering test mode ...
Wed Jun 25, 2025 16:11:56: : DMAC: Device has successfully entered test mode.
Wed Jun 25, 2025 16:11:56: : DMAC: The power mode of Cortex-M4 core was set to ENABLED.
Wed Jun 25, 2025 16:11:56: : Loaded debugee: C:\Users\zhang\Desktop\CYT2BL3_Brushless_Driver_Project-master\Seekfree_CYT2BL3_Double_Foc_Project\project\iar\Debug_m4\Exe\cyt2bl3.out
Wed Jun 25, 2025 16:11:56: : Loaded extra image: C:\Users\zhang\Desktop\CYT2BL3_Brushless_Driver_Project-master\Seekfree_CYT2BL3_Double_Foc_Project\project\iar\project_config\cyt2bl3.ewx, image ID 3
Wed Jun 25, 2025 16:11:56: : LowLevelReset(software, delay 200)
Wed Jun 25, 2025 16:11:56: : LowLevelReset(script, delay 200)
Wed Jun 25, 2025 16:11:56: : Calling reset script: Traveo2_CM4_ResetAndAcquireDevice
Wed Jun 25, 2025 16:11:56: : Download completed.
Wed Jun 25, 2025 16:11:56: : LowLevelReset(software, delay 200)
Wed Jun 25, 2025 16:11:56: : Target reset
Wed Jun 25, 2025 16:11:57: : DMAC: Cortex-M0+ core was reset.
Wed Jun 25, 2025 16:11:57: : DMAC/Trace: Configuring platform side SWO component.
Wed Jun 25, 2025 16:11:57: : INFO: Configuring trace using 'swoinit(baseswo=0xE008_E002,baseitm=0xE000_0002)' setting...
Wed Jun 25, 2025 16:11:57: : INFO: SWO trace mode is not supported by the probe (use I-jet/I-jet-Trace probe) - trace is disabled.
Wed Jun 25, 2025 16:12:07: : Stopped by a vector catch:
Wed Jun 25, 2025 16:12:07: : BusFault fault escalated into HardFault
Wed Jun 25, 2025 16:12:07: : The BusFault handler is disabled
Wed Jun 25, 2025 16:12:07: : HardFault exception.
Wed Jun 25, 2025 16:12:07: : The processor has escalated a configurable-priority exception to HardFault.
Wed Jun 25, 2025 16:12:07: : A precise data access error has occurred (CFSR.PRECISERR, BFAR)
Wed Jun 25, 2025 16:12:07: : At data address 0x1400580c.
Wed Jun 25, 2025 16:12:07: : Exception occurred at PC = 0x10092a64, LR = 0x10092a49
Wed Jun 25, 2025 16:12:07: : See the call stack for more information.
什么意思
最新发布