The first study of arm ----a diary of arm cpu study!
----sdenven
Fosc :晶振频率
Fcco:PLL电流控制振荡器的频率
Fcclk:PLL输出频率(CPU频率)
Fpclk:外设时钟频率;
PLLCON基本操作方法:
① PLLCON=0x01 ,即PLLE位置位,使能PLL部件;
② design VPBDIV(VPB-clock)PLLCFG寄存器,即倍频值(M)和分频值(P);
③ PLLFEED=0xaa,PLLFEED=0x55,// 发送馈送序列
④ 读取PLLSTAT的值,等待PLL锁定;
⑤ PLLCON=0x03,即PLLC位置位,连接PLL时钟;
⑥ PLLFEED=0xaa,PLLFEED=0x55,// 发送馈送序列。
void System_Init(void)
{
#define PLL_VPBDIV 0x00 // VPB=1/4 CCLK;
#define PLL_CFG 0x25 // 6倍 10MHz
PLLCON=1; // enable PLL
VPBDIV=PLL_VPBDIV; // VPB=(1/4)CCLK
PLLCFG=PLL_CFG; // bit(4:0)M={Fcclk/Fosc-1}=5;bit(6.5)P=2;
PLLFEED=0xAA; // 发送馈送序列
PLLFEED=0x55;
while(PLLSTAT&(1<<10)==0);// 等待PLL锁定指定频率
PLLCON=0x03; // 使能和连接
PLLFEED=0xAA; // 发送馈送序列
PLLFEED=0x55;
}
that is all ,and you can design the first step initializtion system of arm cup!
this is a ad convert of arm cup! the ad design is very easy but there have some attentions!
The design step of A/D convert:
① design ADCR(32bits)--bit7...bit0 for channel bit21for form and bit24 for ad start;
② design ADDR(32bits)--bit15...bit6 is data of ad bit31 is a flag of over!
pay attention at very time at the end of the ad convert,there must have a new start signal for the next!
for example:
#define Fpclk 10000000
void ARMAD_Init(void)
{
AD0CR =(1<<0) | // SEL=1,selection channel one
((Fpclk/1000000-1)<<8)| // CLKDIV=1MHz
(0<<16)|
(0<<17)|
(1<<21)|
(0<<22)|
(1<<24)|
(0<<27);
//AD0CR =0x01208001;
}
long ARMAD_Convert(void)
{
long ad_date=0;
while((AD0DR&0x80000000)==0);
//pay attention please:there must be a new ad start signal!
AD0CR |=(1<<24);
//AD0CR =0x01208001;
while((AD0DR&0x80000000)==0);
//AD0CR =0x01208001;
//pay attention please:there must be a new ad start signal!
AD0CR |=(1<<24);
ad_date=AD0DR;
ad_date=(ad_date>>6)&0x3ff;
ad_date=ad_date*3300;
ad_date/=1024;
return ad_date;
}