ds_ipcgetnext() - timeout waiting for mutex

本文探讨了在使用LinkCollector、LinkPartitioner及Interprocess (IPC)阶段时出现的Errortimeoutwaitingformutex错误。文章提供了几种解决策略,包括增加缓冲区大小、调整超时设置、优化SQL查询等。

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Error timeout waiting for mutex



The error message usually looks like follows:
... ds_ipcgetnext() - timeout waiting for mutex

There may be several reasons for the error and thus solutions to get rid of it.
The error usually appears when using Link Collector, Link Partitioner and Interprocess (IPC) stages. It may also appear when doing a lookup with the use of a hash file or if a job is very complex, with the use of many transformers.

There are a few things to consider to work around the problem:
- increase the buffer size (up to to 1024K) and the Timeout value in the Job properties (on the Performance tab).
- ensure that the key columns in active stages or hashed files are composed of allowed characters – get rid of nulls and try to avoid language specific chars which may cause the problem.
- try to simplify the job as much as possible (especially if it’s very complex). Consider splitting it into two or three smaller jobs, review fetches and lookups and try to optimize them (especially have a look at the SQL statements).
- Some time we can get rid of it by rebooting the server.
#include <linux/kernel.h> #include <linux/module.h> #include <linux/init.h> #include <linux/seq_file.h> // single_open #include <linux/slab.h> // kfree kzalloc #include <linux/proc_fs.h> // proc_creat #include <linux/uaccess.h> // copy_from_user #include <linux/version.h> #include "kdrv_pmbus_api.h" static int pmbus_test_show(struct seq_file *seq, void *arg) { return 0; } static int pmbus_test_open(struct inode *pnode, struct file *pfile) { return single_open(pfile, pmbus_test_show, NULL); } int test_kdrv_pmbus_write_block_data(u32 bus_id, u32 slave_addr, u32 cmd, u32 len) { u8 *buf = NULL; int i; u32 ret; buf = (u8 *)kzalloc(len, GFP_KERNEL); if (buf == NULL) { pr_err("kzalloc err!\r\n"); return -ENOMEM; } buf[0] = len - 1; for (i = 1; i < len; i++) { buf[i] = i; } ret = kdrv_pmbus_write_block_data(bus_id, slave_addr, cmd, buf, len); if (ret) { pr_err("kdrv_pmbus_write_block_data fail\r\n"); kfree(buf); return ret; } kfree(buf); return 0; } int test_kdrv_pmbus_read_block_data(u32 bus_id, u32 slave_addr, u32 cmd, u32 len) { int ret; int i; u8 *buf = NULL; buf = (u8 *)kzalloc(len, GFP_KERNEL); if (buf == NULL) { pr_err("kzalloc err!\r\n"); return -ENOMEM; } ret = kdrv_pmbus_read_block_data(bus_id, slave_addr, cmd, buf, len); if (ret) { pr_err("kdrv_pmbus_read_block_data fail bus_id:%#x, addr:%#x, cmd:%#x\n", bus_id, slave_addr, cmd); kfree(buf); return ret; } for (i = 0; i < len; i++) { pr_info("read: bus_id:%#x, addr:%#x, cmd:%#x, buf[%d]:[0x%02x], len:%u\n", bus_id, slave_addr, cmd, i, buf[i], len); } kfree(buf); return 0; } int test_kdrv_pmbus_read_byte(u32 bus_id, u32 slave_addr, u32 cmd) { int ret; u8 data; ret = kdrv_pmbus_read_byte(bus_id, slave_addr, cmd, &data); if (ret) { pr_err("kdrv_pmbus_read_byte fail bus_id:%u, addr:%#x, cmd:%#x\n", bus_id, slave_addr, cmd); return ret; } pr_info("read: bus_id:%#x, addr:%#x, cmd:%#x, data:%#x\n", bus_id, slave_addr, cmd, data); return 0; } int test_kdrv_pmbus_read_word(u32 bus_id, u32 slave_addr, u32 cmd) { int ret; u16 data; ret = kdrv_pmbus_read_word(bus_id, slave_addr, cmd, &data); if (ret) { pr_err("kdrv_pmbus_read_word fail bus_id:%u, addr:%#x, cmd:%#x\n", bus_id, slave_addr, cmd); return ret; } pr_info("read: bus_id:%#x, addr:%#x, cmd:%#x, data:%#x\n", bus_id, slave_addr, cmd, data); return 0; } int test_kdrv_pmbus_write_byte(u32 bus_id, u32 slave_addr, u32 cmd, u32 data) { int ret; ret = kdrv_pmbus_write_byte(bus_id, slave_addr, cmd, (u8)data); if (ret) { pr_err("kdrv_pmbus_write_byte fail bus_id:%u, addr:%#x, cmd:%#x\n", bus_id, slave_addr, cmd); return ret; } pr_info("write byte: bus_id:%#x, addr:%#x, cmd:%#x, data:%#x\n", bus_id, slave_addr, cmd, data); return 0; } int test_kdrv_pmbus_write_word(u32 bus_id, u32 slave_addr, u32 cmd, u32 data) { int ret; ret = kdrv_pmbus_write_word(bus_id, slave_addr, cmd, (u16)data); if (ret) { pr_err("kdrv_pmbus_write_word fail bus_id:%u, addr:%#x, cmd:%#x\n", bus_id, slave_addr, cmd); return ret; } pr_info("write word: bus_id:%#x, addr:%#x, cmd:%#x, data:%#x\n", bus_id, slave_addr, cmd, data); return 0; } int test_kdrv_pmbus_write_cmd(u32 bus_id, u32 slave_addr, u32 cmd) { int ret; ret = kdrv_pmbus_write_cmd(bus_id, slave_addr, cmd); if (ret) { pr_err("kdrv_pmbus_write_cmd fail bus_id:%u, addr:%#x, cmd:%#x\n", bus_id, slave_addr, cmd); return ret; } pr_info("write word: bus_id:%#x, addr:%#x, cmd:%#x\n", bus_id, slave_addr, cmd); return 0; } #define PMBUS_CMD_READ_BYTE 0 #define PMBUS_CMD_READ_WORD 1 #define PMBUS_CMD_WRITE_BYTE 2 #define PMBUS_CMD_WRITE_WORD 3 #define PMBUS_CMD_READ_BLOCK 4 #define PMBUS_CMD_WRITE_BLOCK 5 #define PMBUS_CMD_WRITE_CMD 6 #define PMBUS_CMD_RESET 7 #define PMBUS_CMD_INIT 8 #define CFG_LINE_SIZE 120 static ssize_t pmbus_test_write(struct file *file, const char __user *buf, size_t len, loff_t *ppos) { u32 cmd; u32 bus_id; u32 command; u32 data; u32 slave_addr; char *next = NULL; char line[CFG_LINE_SIZE] = {0}; if (len > (CFG_LINE_SIZE - 1)) { return -E2BIG; } if (copy_from_user(line, buf, len)) { return -EINVAL; } /* usage: echo <cmd> [bus_id][slave_addr] [cmd] > pmbus_test */ cmd = simple_strtoul(line, &next, 0); bus_id = simple_strtoul(next + 1, &next, 0); switch (cmd) { case PMBUS_CMD_READ_BYTE: slave_addr = simple_strtoul(next + 1, &next, 0); command = simple_strtoul(next + 1, &next, 0); (void)test_kdrv_pmbus_read_byte(bus_id, slave_addr, command); break; case PMBUS_CMD_READ_WORD: slave_addr = simple_strtoul(next + 1, &next, 0); command = simple_strtoul(next + 1, &next, 0); (void)test_kdrv_pmbus_read_word(bus_id, slave_addr, command); break; case PMBUS_CMD_WRITE_BYTE: slave_addr = simple_strtoul(next + 1, &next, 0); command = simple_strtoul(next + 1, &next, 0); data = simple_strtoul(next + 1, &next, 0); (void)test_kdrv_pmbus_write_byte(bus_id, slave_addr, command, (u8)data); break; case PMBUS_CMD_WRITE_WORD: slave_addr = simple_strtoul(next + 1, &next, 0); command = simple_strtoul(next + 1, &next, 0); data = simple_strtoul(next + 1, &next, 0); (void)test_kdrv_pmbus_write_word(bus_id, slave_addr, command, (u16)data); break; case PMBUS_CMD_READ_BLOCK: slave_addr = simple_strtoul(next + 1, &next, 0); command = simple_strtoul(next + 1, &next, 0); data = simple_strtoul(next + 1, &next, 0); (void)test_kdrv_pmbus_read_block_data(bus_id, slave_addr, command, data); break; case PMBUS_CMD_WRITE_BLOCK: slave_addr = simple_strtoul(next + 1, &next, 0); command = simple_strtoul(next + 1, &next, 0); data = simple_strtoul(next + 1, &next, 0); (void)test_kdrv_pmbus_write_block_data(bus_id, slave_addr, command, data); break; case PMBUS_CMD_WRITE_CMD: slave_addr = simple_strtoul(next + 1, &next, 0); command = simple_strtoul(next + 1, &next, 0); (void)test_kdrv_pmbus_write_cmd(bus_id, slave_addr, command); break; case PMBUS_CMD_RESET: (void)kdrv_pmbus_reset(bus_id); break; case PMBUS_CMD_INIT: data = simple_strtoul(next + 1, &next, 0); (void)kdrv_pmbus_init(bus_id, data); break; default: break; } return len; } #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0) static const struct proc_ops g_pmbus_operations = { .proc_open = pmbus_test_open, .proc_read = seq_read, .proc_write = pmbus_test_write, .proc_lseek = seq_lseek, .proc_release = single_release, }; #else static const struct file_operations g_pmbus_operations = { .open = pmbus_test_open, .read = seq_read, .write = pmbus_test_write, .llseek = seq_lseek, .release = single_release, }; #endif int __init pmbus_test_mod_init(void) { (void)proc_create("pmbus_test", S_IRUSR, NULL, &g_pmbus_operations); printk("pmbus_test_mod_init\r\n"); return 0; } void __exit pmbus_test_mod_exit(void) { (void)remove_proc_entry("pmbus_test", NULL); printk("pmbus_test_mod_exit\r\n"); } module_init(pmbus_test_mod_init); module_exit(pmbus_test_mod_exit); MODULE_DESCRIPTION("udrv pmbus api test"); MODULE_LICENSE("GPL");" #include <linux/delay.h> #include <linux/vmalloc.h> #include <linux/slab.h> #include <linux/io.h> #include <linux/iopoll.h> #include <linux/types.h> #include <linux/bitfield.h> #include "hisi_pmbus.h" #define STANDARD_MODE 1 #define FAST_MODE 2 #define GPIO_LEVEL_LOW 0 #define GPIO_LEVEL_HIGH 1 #define SET_LOW_HIGH_TIMES 9 #define AVS_WR_OPEN_REG 0x0004 #define AVS_INT_STATUS_REG 0x0008 #define AVS_INT_CLEAR_REG 0x0020 #define TRIGGER_CFG_REG 0x00B8 #define PMBUS_DISABLE 0x00 #define PMBUS_ENABLE 0x01 /* PMBUSIF_REG_GEN Base address of Module's Register */ #define PMBUSIF_REG_GEN_BASE (0x800) #define I2C_CON_REG (PMBUSIF_REG_GEN_BASE + 0x0) /* I2C控制寄存器。 */ #define I2C_CON_MASTER_ENABLE BIT(0) #define I2C_CON_SPEED_MASK (0x6U) #define I2C_CON_RESTART_EN BIT(5) #define I2C_CON_SLAVE_DISABLE BIT(6) #define I2C_DATA_CMD_REG (PMBUSIF_REG_GEN_BASE + 0x10) /* I2C数据操作寄存器。 */ #define I2C_SS_SCL_HCNT_REG (PMBUSIF_REG_GEN_BASE + 0x14) /* I2C标准速度模式SCL高电平配置寄存器。 */ #define I2C_SS_SCL_LCNT_REG (PMBUSIF_REG_GEN_BASE + 0x18) /* I2C标准速度模式SCL低电平配置寄存器。 */ #define I2C_FS_SCL_HCNT_REG (PMBUSIF_REG_GEN_BASE + 0x1C) /* I2C快速模式SCL高电平配置寄存器。 */ #define I2C_FS_SCL_LCNT_REG (PMBUSIF_REG_GEN_BASE + 0x20) /* I2C快速模式SCL低电平配置寄存器。 */ #define I2C_INTR_STAT_REG (PMBUSIF_REG_GEN_BASE + 0x2C) /* I2C屏蔽后中断状态寄存器。 */ #define I2C_INTR_MASK_REG (PMBUSIF_REG_GEN_BASE + 0x30) /* I2C中断屏蔽寄存器。 */ #define I2C_INTR_RAW_REG (PMBUSIF_REG_GEN_BASE + 0x34) /* I2C原始中断状态寄存器。 */ #define I2C_INTR_RAW_TX_ABRT BIT(6) #define I2C_INTR_RAW_ALERT_DET BIT(12) #define I2C_INTR_RAW_SCL_LOW_TOUT BIT(15) #define I2C_INTR_RAW_PMBUS_CMD_FINISH BIT(17) #define I2C_ENABLE_REG (PMBUSIF_REG_GEN_BASE + 0x6C) /* I2C工作使能寄存器。 */ #define I2C_STATUS_REG (PMBUSIF_REG_GEN_BASE + 0x70) /* I2C状态寄存器。 */ #define I2C_RXFLR_REG (PMBUSIF_REG_GEN_BASE + 0x78) /* RX_FIFO有效数据指示寄存器。 */ #define I2C_SDA_HOLD_REG (PMBUSIF_REG_GEN_BASE + 0x7C) /* SDA保持时间配置寄存器。 */ #define I2C_ENABLE_STATUS_REG (PMBUSIF_REG_GEN_BASE + 0x9C) /* I2C状态寄存器。 */ #define I2C_SCL_SWITCH_REG (PMBUSIF_REG_GEN_BASE + 0xA0) /* I2C防挂死SCL使能寄存器。 */ #define I2C_SCL_SIM_REG (PMBUSIF_REG_GEN_BASE + 0xA4) /* I2C防挂死SCL模拟寄存器。 */ #define I2C_LOCK_REG (PMBUSIF_REG_GEN_BASE + 0xAC) /* I2C lock寄存器。 */ #define I2C_SDA_SWITCH_REG (PMBUSIF_REG_GEN_BASE + 0xB0) /* I2C防挂死SDA使能寄存器。 */ #define I2C_SDA_SIM_REG (PMBUSIF_REG_GEN_BASE + 0xB4) /* I2C防挂死SDA模拟寄存器。 */ #define I2C_PMBUS_CTRL_REG (PMBUSIF_REG_GEN_BASE + 0x104) /* PMBUS全局控制寄存器。 */ #define I2C_PMBUS_CTRL_PEC_EN BIT(2) #define I2C_PMBUS_CTRL_ALERT_EN BIT(1) #define I2C_LOW_TIMEOUT_REG (PMBUSIF_REG_GEN_BASE + 0x108) /* SCL低电平超时值配置寄存器。 */ #define I2C_PMBUS_SCL_DET_REG (PMBUSIF_REG_GEN_BASE + 0x12C) /* PMBUS SCL检测寄存器。 */ #define I2C_PMBUS_SCL_DET_IDLE_DET_EN BIT(0) #define I2C_PMBUS_SCL_DET_TIMEOUT_EN BIT(1) #define I2C_PMBUS_IDLECNT_REG (PMBUSIF_REG_GEN_BASE + 0x130) /* SCL高电平空闲值配置寄存器。 */ #define I2C_PMBUS_RST_REG (PMBUSIF_REG_GEN_BASE + 0x134) /* 软件复位配置寄存器。 */ /* PMBUS_PROC_REG_GEN Base address of Module's Register */ #define PMBUS_PROC_REG_GEN_BASE (0xA00) #define PMBUS_WR_OPEN_REG (PMBUS_PROC_REG_GEN_BASE + 0x4) /* PMBUS全局参数保护寄存器。 */ #define PMBUS_INT_CLR_REG (PMBUS_PROC_REG_GEN_BASE + 0x10) /* PMBUS中断清除寄存器 */ #define PMBUS_WAIT_CNT 30000 /* PMU CMD */ #define STOP_EN (1U << 10) #define ADDR_EN (1U << 9) #define CMD_READ (1U << 8) #define SDA_IN BIT(9) #define PMBUS_I2C_RECOVERY_CYCLE_CNT 10 static inline void pmbus_reg_write(struct io_region *reg_region, u32 reg, u32 val) { pr_debug("[iWare][Debug] %s reg=%#x val =%#x\r\n", __FUNCTION__, reg, val); iowrite32(val, reg_region->io_base + reg); } static inline u32 pmbus_reg_read(struct io_region *reg_region, u32 reg) { u32 val; val = ioread32(reg_region->io_base + reg); pr_debug("[iWare][Debug] %s reg=%#x val =%#x\r\n", __FUNCTION__, reg, val); return val; } /* try to recovery the bus if sda locked to low level */ static void pmbus_recovery_bus(struct io_region *reg_region) { int i; u32 status; status = pmbus_reg_read(reg_region, I2C_STATUS_REG); /* if SDA keep low, assume the bus hang up */ if ((status & SDA_IN) == 0) { /* disable pmbus */ pmbus_reg_write(reg_region, I2C_ENABLE_REG, 0x0); /* enable output software simulaition */ pmbus_reg_write(reg_region, I2C_SCL_SWITCH_REG, 0x1); pmbus_reg_write(reg_region, I2C_SDA_SWITCH_REG, 0x1); /* output at least 9 clocks to try to recover the bus */ for (i = 0; i < PMBUS_I2C_RECOVERY_CYCLE_CNT; i++) { pmbus_reg_write(reg_region, I2C_SCL_SIM_REG, 0x0); udelay(50); // 延时50us pmbus_reg_write(reg_region, I2C_SCL_SIM_REG, 0x1); udelay(50); // 延时50us } /* disable output software simulaition */ pmbus_reg_write(reg_region, I2C_SCL_SWITCH_REG, 0x0); pmbus_reg_write(reg_region, I2C_SDA_SWITCH_REG, 0x0); /* enable pmbus */ pmbus_reg_write(reg_region, I2C_ENABLE_REG, 0x1); pr_info("[iWare][Info] pmbus hang recovery done\n"); } } static int pmbus_wait_write_finish(struct io_region *reg_region) { int i; u32 status = 0; for (i = 0; i < PMBUS_WAIT_CNT; i++) { status = pmbus_reg_read(reg_region, I2C_INTR_RAW_REG); if (((status & I2C_INTR_RAW_SCL_LOW_TOUT) == 0) && ((status & I2C_INTR_RAW_TX_ABRT) == 0) && ((status & I2C_INTR_RAW_PMBUS_CMD_FINISH) != 0)) { // 清除所有中断 pmbus_reg_write(reg_region, I2C_INTR_RAW_REG, 0xffffffff); return 0; } udelay(1); } pr_err("[iWare][Error] pmbus_write timeout! raw_int_status:0x%x\n", status); // 清除所有中断 pmbus_reg_write(reg_region, I2C_INTR_RAW_REG, 0xffffffff); pmbus_recovery_bus(reg_region); return -EBUSY; } static int pmbus_send_byte_v200(struct io_region *reg_region, struct pmbus_msg *msg) { pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, ADDR_EN | msg->slave_addr); if ((msg->type & PMBUS_FLAG_EXT) != 0) { pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, STOP_EN | msg->command); pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, STOP_EN | msg->command_ext); } else { pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, STOP_EN | msg->command); } return pmbus_wait_write_finish(reg_region); } static int pmbus_write_bytes_v200(struct io_region *reg_region, struct pmbus_msg *msg) { unsigned int i; pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, ADDR_EN | msg->slave_addr); pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, msg->command); if ((msg->type & PMBUS_FLAG_EXT) != 0) { pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, msg->command_ext); } for (i = 0; i < msg->data_len - 1; i++) { pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, msg->data[i]); } pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, STOP_EN | msg->data[msg->data_len - 1]); return pmbus_wait_write_finish(reg_region); } #define PMBUS_READ_WAIT_TIMEOUT 1000000ULL #define PMUBS_READ_WAIT_DELAY_US 1UL static int pmbus_wait_read_finish(struct io_region *reg_region, u8 read_len) { int ret; u32 data_num; ret = readl_poll_timeout(reg_region->io_base + I2C_RXFLR_REG, data_num, (data_num >= read_len), PMUBS_READ_WAIT_DELAY_US, PMBUS_READ_WAIT_TIMEOUT); if (ret != 0) { pr_err("[iWare][Error] wait read_finish timeout!! read_len[%u] fifo num[%u], raw_int_status:0x%x\n", read_len, data_num, pmbus_reg_read(reg_region, I2C_INTR_RAW_REG)); // 清除所有中断 pmbus_reg_write(reg_region, I2C_INTR_RAW_REG, 0xffffffff); pmbus_recovery_bus(reg_region); return ret; } return 0; } static void pmbus_clear_rx_fifo(struct io_region *reg_region) { u8 rx_fifo_data_num; u8 i; u32 tmp; /* clean rx fifo */ rx_fifo_data_num = (u8)pmbus_reg_read(reg_region, I2C_RXFLR_REG); for (i = 0; i < rx_fifo_data_num; i++) { tmp = pmbus_reg_read(reg_region, I2C_DATA_CMD_REG); // 把fifo读清 } } static int pmbus_read_bytes_v200(struct io_region *reg_region, struct pmbus_msg *msg) { int ret; unsigned int i; u32 status; /* 先把rx fifo读清 */ pmbus_clear_rx_fifo(reg_region); pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, ADDR_EN | msg->slave_addr); pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, msg->command); if ((msg->type & PMBUS_FLAG_EXT) != 0) { // 扩展16bit 命令 pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, msg->command_ext); } pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, ADDR_EN | CMD_READ | msg->slave_addr); for (i = 0; i < msg->data_len - 1; i++) { pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, CMD_READ); } pmbus_reg_write(reg_region, I2C_DATA_CMD_REG, STOP_EN | CMD_READ); ret = pmbus_wait_read_finish(reg_region, msg->data_len); if (ret != 0) { pr_err("[iWare][Error] %s slave_addr(0x%x), cmd(0x%x), time out\n", __func__, msg->slave_addr, msg->command); pmbus_recovery_bus(reg_region); return -EAGAIN; } for (i = 0; i < msg->data_len; i++) { msg->data[i] = (u8)pmbus_reg_read(reg_region, I2C_DATA_CMD_REG); } /* for block read, first read code is data length */ if ((msg->type & PMBUS_FLAG_BLOCK) != 0) { if (msg->data[0] > msg->data_len) { pr_info("[iWare][Info] pmbus read slave[0x%02x] command[0x%02x] block data may lossed, toalLen[%u]\n", msg->slave_addr, msg->command, msg->data[0]); } } // 清中断 status = pmbus_reg_read(reg_region, I2C_INTR_RAW_REG); pmbus_reg_write(reg_region, I2C_INTR_RAW_REG, status); return 0; } static int pmbus_reset_v200(struct io_region *reg_region) { pmbus_reg_write(reg_region, I2C_PMBUS_RST_REG, 1); udelay(1); pmbus_reg_write(reg_region, I2C_PMBUS_RST_REG, 0); udelay(1); return 0; } /* 不同soc解锁码不同, chip dtsi里配置 309a 1260 avs_wr_unlock_key 0x5a5a5a5a 0x1ACCE551 pmbus_wr_unlock_key 0x5a5a5a5a 0x1ACCE551 i2c_unlock_key 0x5a5a5a5a 0x36313832 */ static void pmbus_unlock_reg(struct io_region *reg_region, struct pmbus_unlock_key *key) { /* unlock avs wr */ pmbus_reg_write(reg_region, AVS_WR_OPEN_REG, key->avs_wr_unlock_key); /* unlock pmbus wr */ pmbus_reg_write(reg_region, PMBUS_WR_OPEN_REG, key->pmbus_wr_unlock_key); /* unlock pmbus i2c wr */ pmbus_reg_write(reg_region, I2C_LOCK_REG, key->i2c_unlock_key); } static void pmbus_config_timing_cnt(struct io_region *reg_region, u8 speed_mode, struct pmbus_timings_cfg *pmbus_cfg) { if (speed_mode == STANDARD_MODE) { // 标准模式 pmbus_reg_write(reg_region, I2C_SS_SCL_LCNT_REG, pmbus_cfg->lcnt); pmbus_reg_write(reg_region, I2C_SS_SCL_HCNT_REG, pmbus_cfg->hcnt); } else { // 快速模式 pmbus_reg_write(reg_region, I2C_FS_SCL_LCNT_REG, pmbus_cfg->lcnt); pmbus_reg_write(reg_region, I2C_FS_SCL_HCNT_REG, pmbus_cfg->hcnt); } // 屏蔽所有中断 pmbus_reg_write(reg_region, I2C_INTR_MASK_REG, 0xFFFFFFFF); pmbus_reg_write(reg_region, I2C_SDA_HOLD_REG, pmbus_cfg->hold_cnt); // PMBus的SCL低电平超时值(PMBus协议规定为25~35ms) pmbus_reg_write(reg_region, I2C_LOW_TIMEOUT_REG, pmbus_cfg->timeout_cnt); // 默认30ms // PMBus的SCL高电平空闲值(PMBus协议规定为>50us) pmbus_reg_write(reg_region, I2C_PMBUS_IDLECNT_REG, pmbus_cfg->idle_cnt); // 默认100us } static int pmbus_init_v200(struct io_region *reg_region, u32 pec_en, u32 bus_freq_hz, struct pmbus_timings_cfg *cfg, struct pmbus_unlock_key *key) { u32 val = 0; u8 speed_mode; int ret; if (bus_freq_hz > PMBUS_MAX_FAST_MODE_FREQ) { pr_err("[iWare][Error] invalid para bus_freq_hz =%u\r\n", bus_freq_hz); return -EINVAL; } ret = pmbus_reset_v200(reg_region); if (ret != 0) { return ret; } /* unlock */ pmbus_unlock_reg(reg_region, key); /* stop triger */ pmbus_reg_write(reg_region, TRIGGER_CFG_REG, 0x0); /* disable pmbus */ pmbus_reg_write(reg_region, I2C_ENABLE_REG, PMBUS_DISABLE); speed_mode = (bus_freq_hz <= PMBUS_MAX_STANDARD_MODE_FREQ) ? STANDARD_MODE : FAST_MODE; val |= I2C_CON_MASTER_ENABLE | I2C_CON_SLAVE_DISABLE | I2C_CON_RESTART_EN; val |= (u32)FIELD_PREP(I2C_CON_SPEED_MASK, speed_mode); pmbus_reg_write(reg_region, I2C_CON_REG, val); pmbus_config_timing_cnt(reg_region, speed_mode, cfg); /* config scl detect */ pmbus_reg_write(reg_region, I2C_PMBUS_SCL_DET_REG, I2C_PMBUS_SCL_DET_IDLE_DET_EN | I2C_PMBUS_SCL_DET_TIMEOUT_EN); /* enable pec and alert */ val = I2C_PMBUS_CTRL_ALERT_EN; if (pec_en != 0) { pr_info("[iWare][Info] pmbus enable pec \r\n"); val |= I2C_PMBUS_CTRL_PEC_EN; } pmbus_reg_write(reg_region, I2C_PMBUS_CTRL_REG, val); /* enable pmbus */ pmbus_reg_write(reg_region, I2C_ENABLE_REG, PMBUS_ENABLE); // 清中断 pmbus_reg_write(reg_region, AVS_INT_CLEAR_REG, 0xFFFFFFFF); pmbus_reg_write(reg_region, PMBUS_INT_CLR_REG, 0xFFFFFFFF); pmbus_reg_write(reg_region, I2C_INTR_RAW_REG, 0xFFFFFFFF); return 0; } const struct hisi_pmbus_ops hisi_pmbus_v200_ops = { .init = pmbus_init_v200, .reset = pmbus_reset_v200, .send_byte = pmbus_send_byte_v200, .read_bytes = pmbus_read_bytes_v200, .write_bytes = pmbus_write_bytes_v200, }; const struct hisi_pmbus_ops *hisi_pmbus_get_ops(void) { return &hisi_pmbus_v200_ops; }" #include <linux/device.h> #include <linux/errno.h> #include "hisi_pmbus.h" #include "kdrv_pmbus_api.h" #define PMBUS_BLOCK_MAX 32 static void hisi_pmbus_fill_msg(struct pmbus_msg *msg, u8 type, u8 slave_addr, u16 command) { u8 cmd; cmd = (u8)(command >> 0x8); // 高8位为extended cmd 指示这是一条扩展命令 if ((cmd == PMBUS_MFR_SPECIFIC_COMMAND_EXT || cmd == PMBUS_COMMAND_EXT)) { msg->type = type | PMBUS_FLAG_EXT; msg->command = cmd; msg->command_ext = (u8)command; } else { msg->type = type; msg->command = (u8)command; } msg->slave_addr = slave_addr; } static int hisi_pmbus_xfer(struct hisi_pmbus_data *pmbus, struct pmbus_msg *msg) { int ret; if ((msg->data == NULL) && (msg->data_len > 0)) { dev_err(pmbus->dev, "[iWare][Error] msg->data = NULL, msg.data_len %zu\r\n", msg->data_len); return -EINVAL; } if ((msg->type & PMBUS_FLAG_NO_DATA) != 0) { ret = pmbus->ops->send_byte(&pmbus->reg_region, msg); } else if ((msg->type & PMBUS_FLAG_READ) != 0) { ret = pmbus->ops->read_bytes(&pmbus->reg_region, msg); } else { /* pmbus write */ ret = pmbus->ops->write_bytes(&pmbus->reg_region, msg); } return ret; } int kdrv_pmbus_reset(u32 bus_id) { struct hisi_pmbus_data *pmbus = NULL; pmbus = hisi_pmbus_data_get_by_id(bus_id); if (pmbus == NULL) { pr_err("[iWare][Error] get pmbus data fail: pmbus_id=%u,\n", bus_id); return -EPERM; } mutex_lock(&pmbus->lock); pmbus->ops->reset(&pmbus->reg_region); mutex_unlock(&pmbus->lock); return 0; } EXPORT_SYMBOL(kdrv_pmbus_reset); int kdrv_pmbus_init(u32 bus_id, u32 bus_freq_hz) { struct hisi_pmbus_data *pmbus = NULL; int ret; u32 total_cnt; pmbus = hisi_pmbus_data_get_by_id(bus_id); if (pmbus == NULL) { pr_err("[iWare][Error] get pmbus data fail: pmbus_id=%u,\n", bus_id); return -EPERM; } if (bus_freq_hz > PMBUS_MAX_FAST_MODE_FREQ || bus_freq_hz == 0) { pr_err("[iWare][Error] invalid para bus_freq_hz =%u \r\n", bus_freq_hz); return -EINVAL; } mutex_lock(&pmbus->lock); pmbus->timing.bus_freq_hz = bus_freq_hz; total_cnt = (u32)DIV_ROUND_UP_ULL(pmbus->timing.clk_freq_mhz * HZ_PER_MHZ, bus_freq_hz); pmbus->timing_cfg.hcnt = (pmbus->timing.scl_high_ratio * total_cnt) / 100; // 占空比放大了100倍 这里除以100 pmbus->timing_cfg.lcnt = total_cnt - pmbus->timing_cfg.hcnt; pr_info("[iWare][Info] %s bus_freq_hz %u, total_cnt %u, hcnt %u lcnt %u\n", __func__, bus_freq_hz, total_cnt, pmbus->timing_cfg.hcnt, pmbus->timing_cfg.lcnt); ret = pmbus->ops->init(&pmbus->reg_region, pmbus->pec_en, pmbus->timing.bus_freq_hz, &pmbus->timing_cfg, &pmbus->key); if (ret != 0) { mutex_unlock(&pmbus->lock); pr_err("[iWare][Error] kdrv_pmbus_init failed ret=%d\n", ret); return ret; } mutex_unlock(&pmbus->lock); return 0; } EXPORT_SYMBOL(kdrv_pmbus_init); int kdrv_pmbus_write_word(u32 bus_id, u8 slave_addr, u16 command, u16 data) { struct hisi_pmbus_data *pmbus = NULL; struct pmbus_msg msg = { 0 }; int ret; pmbus = hisi_pmbus_data_get_by_id(bus_id); if (pmbus == NULL) { pr_err("[iWare][Error] kdrv_pmbus_write_word,get pmbus data fail: pmbus_id=%u,\n", bus_id); return -EPERM; } mutex_lock(&pmbus->lock); msg.data = (u8 *)&data; msg.data_len = sizeof(u16); hisi_pmbus_fill_msg(&msg, PMBUS_WRITE_WORD, slave_addr, command); ret = hisi_pmbus_xfer(pmbus, &msg); if (ret != 0) { mutex_unlock(&pmbus->lock); return ret; } mutex_unlock(&pmbus->lock); return 0; } EXPORT_SYMBOL(kdrv_pmbus_write_word); int kdrv_pmbus_write_byte(u32 bus_id, u8 slave_addr, u16 command, u8 data) { struct hisi_pmbus_data *pmbus = NULL; struct pmbus_msg msg = { 0 }; int ret; pmbus = hisi_pmbus_data_get_by_id(bus_id); if (pmbus == NULL) { pr_err("[iWare][Error] kdrv_pmbus_write_byte, get pmbus data fail: pmbus_id=%u,\n", bus_id); return -EPERM; } mutex_lock(&pmbus->lock); msg.data = &data; msg.data_len = sizeof(u8); hisi_pmbus_fill_msg(&msg, PMBUS_WRITE_BYTE, slave_addr, command); ret = hisi_pmbus_xfer(pmbus, &msg); if (ret != 0) { mutex_unlock(&pmbus->lock); return ret; } mutex_unlock(&pmbus->lock); return 0; } EXPORT_SYMBOL(kdrv_pmbus_write_byte); int kdrv_pmbus_write_cmd(u32 bus_id, u8 slave_addr, u16 command) { struct hisi_pmbus_data *pmbus = NULL; struct pmbus_msg msg = { 0 }; int ret; pmbus = hisi_pmbus_data_get_by_id(bus_id); if (pmbus == NULL) { pr_err("[iWare][Error] kdrv_pmbus_write_cmd, get pmbus data fail: pmbus_id=%u,\n", bus_id); return -EPERM; } mutex_lock(&pmbus->lock); hisi_pmbus_fill_msg(&msg, PMBUS_SEND_BYTE, slave_addr, command); ret = hisi_pmbus_xfer(pmbus, &msg); if (ret != 0) { mutex_unlock(&pmbus->lock); return ret; } mutex_unlock(&pmbus->lock); return 0; } EXPORT_SYMBOL(kdrv_pmbus_write_cmd); int kdrv_pmbus_read_byte(u32 bus_id, u8 slave_addr, u16 command, u8 *data) { struct hisi_pmbus_data *pmbus = NULL; struct pmbus_msg msg = { 0 }; int ret; if (data == NULL) { pr_err("[iWare][Error] ivalid para, data is null point,\n"); return -EINVAL; } pmbus = hisi_pmbus_data_get_by_id(bus_id); if (pmbus == NULL) { pr_err("[iWare][Error] get pmbus data fail: pmbus_id=%u,\n", bus_id); return -EPERM; } mutex_lock(&pmbus->lock); msg.data = data; msg.data_len = sizeof(u8); hisi_pmbus_fill_msg(&msg, PMBUS_READ_BYTE, slave_addr, command); ret = hisi_pmbus_xfer(pmbus, &msg); if (ret != 0) { mutex_unlock(&pmbus->lock); return ret; } mutex_unlock(&pmbus->lock); return 0; } EXPORT_SYMBOL(kdrv_pmbus_read_byte); int kdrv_pmbus_read_word(u32 bus_id, u8 slave_addr, u16 command, u16 *data) { struct hisi_pmbus_data *pmbus = NULL; struct pmbus_msg msg = { 0 }; int ret; u8 tmp[2] = {0}; // 2个字节 if (data == NULL) { pr_err("[iWare][Error] ivalid para, data is null point,\n"); return -EINVAL; } pmbus = hisi_pmbus_data_get_by_id(bus_id); if (pmbus == NULL) { pr_err("[iWare][Error] get pmbus data fail: pmbus_id=%u,\n", bus_id); return -EPERM; } mutex_lock(&pmbus->lock); msg.data = tmp; msg.data_len = sizeof(u16); hisi_pmbus_fill_msg(&msg, PMBUS_READ_WORD, slave_addr, command); ret = hisi_pmbus_xfer(pmbus, &msg); if (ret != 0) { mutex_unlock(&pmbus->lock); return ret; } *data = (((u16)tmp[1]) << 8) + ((u16)tmp[0]); // 高8位 mutex_unlock(&pmbus->lock); return 0; } EXPORT_SYMBOL(kdrv_pmbus_read_word); int kdrv_pmbus_write_block_data(u32 bus_id, u8 slave_addr, u16 command, u8 *pbuf, u32 len) { struct hisi_pmbus_data *pmbus = NULL; struct pmbus_msg msg = { 0 }; int ret; if ((pbuf == NULL) || (len == 0)) { pr_err("[iWare][Error] para err: bus_id(%d),slave_addr(0x%x), len(%u)\n", bus_id, slave_addr, len); return -EINVAL; } if (len > PMBUS_BLOCK_MAX) { pr_err("[iWare][Error] para err: len(%u) exceed PMBUS_BLOCK_MAX(32)\n", len); return -EINVAL; } pmbus = hisi_pmbus_data_get_by_id(bus_id); if (pmbus == NULL) { pr_err("[iWare][Error] get pmbus data fail: pmbus_id=%u,\n", bus_id); return -EPERM; } mutex_lock(&pmbus->lock); msg.data = pbuf; msg.data_len = (u8)len; hisi_pmbus_fill_msg(&msg, PMBUS_WRITE_BLOCK, slave_addr, command); ret = hisi_pmbus_xfer(pmbus, &msg); if (ret != 0) { mutex_unlock(&pmbus->lock); return ret; } mutex_unlock(&pmbus->lock); return 0; } EXPORT_SYMBOL(kdrv_pmbus_write_block_data); int kdrv_pmbus_read_block_data(u32 bus_id, u8 slave_addr, u16 command, u8 *pbuf, u32 len) { struct hisi_pmbus_data *pmbus = NULL; struct pmbus_msg msg = { 0 }; int ret; if ((pbuf == NULL) || (len == 0)) { pr_err("[iWare][Error] para err: bus_id(%d),slave_addr(0x%x), len(%u)\n", bus_id, slave_addr, len); return -EINVAL; } if (len > PMBUS_BLOCK_MAX) { pr_err("[iWare][Error] para err: len(%u) exceed PMBUS_BLOCK_MAX(32)\n", len); return -EINVAL; } pmbus = hisi_pmbus_data_get_by_id(bus_id); if (pmbus == NULL) { pr_err("[iWare][Error] get pmbus data fail: pmbus_id=%u,\n", bus_id); return -EPERM; } mutex_lock(&pmbus->lock); msg.data = pbuf; msg.data_len = (u8)len; hisi_pmbus_fill_msg(&msg, PMBUS_READ_BLOCK, slave_addr, command); ret = hisi_pmbus_xfer(pmbus, &msg); if (ret != 0) { mutex_unlock(&pmbus->lock); return ret; } mutex_unlock(&pmbus->lock); return 0; } EXPORT_SYMBOL(kdrv_pmbus_read_block_data); " “测试步骤为 ”insmod /lib/udrivers/hi309a_pmbus_api_test.ko devmem 0xfa860204 w 0 devmem 0xfa860220 w 0 echo 3 1 0x70 0x21 0xf4 > /proc/pmbus_test (设置输出电压) “ 然后再设置输出电压之后报以下错误 [60585.219727] [iWare][Error] pmbus_write timeout! raw_int_status:0x10 [60585.227034] [iWare][Info] pmbus hang recovery done [60585.231848] kdrv_pmbus_write_word fail bus_id:1, addr:0x70, cmd:0x21 hi309a /lib/udrivers # cat /proc/interrupts | grep i2c 87: 0 0 0 0 0 0 0 0 GICv3 294 Level hisi-i2c 88: 0 0 0 0 0 0 0 0 GICv3 295 Level hisi-i2c 89: 0 0 0 0 0 0 0 0 GICv3 297 Level hisi-i2c 90: 0 0 0 0 0 0 0 0 GICv3 298 Level hisi-i2c 91: 0 0 0 0 0 0 0 0 GICv3 299 Level hisi-i2c 92: 0 0 0 0 0 0 0 0 GICv3 300 Level hisi-i2c 93: 0 0 0 0 0 0 0 0 GICv3 301 Level hisi-i2c 94: 0 0 0 0 0 0 0 0 GICv3 686 Level hisi-i2c 95: 0 0 0 0 0 0 0 0 GICv3 687 Level hisi-i2c hi309a /lib/udrivers # dmesg | grep -e "iWare" -e "PMBUS" [ 10.511319] [iWare][Info] IOMUX register size (4 bytes) [ 10.519453] hgpio fa540000.gpio: [iWare][Info] hisi_gpio_probe: start [ 10.526277] hgpio fa550000.gpio: [iWare][Info] hisi_gpio_probe: start [ 10.533075] hgpio fa560000.gpio: [iWare][Info] hisi_gpio_probe: start [ 10.539847] hgpio fa570000.gpio: [iWare][Info] hisi_gpio_probe: start [ 10.546656] hgpio fa580000.gpio: [iWare][Info] hisi_gpio_probe: start [ 10.553439] hgpio fa590000.gpio: [iWare][Info] hisi_gpio_probe: start [ 10.560210] hgpio fa5a0000.gpio: [iWare][Info] hisi_gpio_probe: start [ 10.567034] hgpio fa5b0000.gpio: [iWare][Info] hisi_gpio_probe: start [ 10.573814] hgpio faa90000.gpio: [iWare][Info] hisi_gpio_probe: start [ 10.580559] hgpio faaa0000.gpio: [iWare][Info] hisi_gpio_probe: start [ 10.590111] hisi_spi_drv fa400000.spi: [iWare] can't get clk-freq, use default value [ 10.597941] hisi_spi_drv fa400000.spi: [iWare][Info] [hisi spi_get_clk_rst_info] get rst clk success [ 10.607234] hisi_spi_drv fa400000.spi: [iWare][Info] spi reset success [ 10.614459] hisi_spi_drv fa410000.spi: [iWare] can't get clk-freq, use default value [ 10.622295] hisi_spi_drv fa410000.spi: [iWare][Info] [hisi spi_get_clk_rst_info] get rst clk success [ 10.631589] hisi_spi_drv fa410000.spi: [iWare][Info] spi reset success [ 10.638791] hisi_spi_drv fa420000.spi: [iWare] can't get clk-freq, use default value [ 10.646633] hisi_spi_drv fa420000.spi: [iWare][Info] [hisi spi_get_clk_rst_info] get rst clk success [ 10.655934] hisi_spi_drv fa420000.spi: [iWare][Info] spi reset success [ 10.663149] hisi_spi_drv fa430000.spi: [iWare] can't get clk-freq, use default value [ 10.670998] hisi_spi_drv fa430000.spi: [iWare][Info] [hisi spi_get_clk_rst_info] get rst clk success [ 10.680292] hisi_spi_drv fa430000.spi: [iWare][Info] spi reset success [ 10.690479] hisi-i2c fa380000.i2c: [iWare][Info] hisi_i2c_probe start [ 10.697006] hisi-i2c fa380000.i2c: [iWare][Info] i2c scl_high_ratio no cfg [ 10.703944] hisi-i2c fa380000.i2c: [iWare][Info] get rst and clk from dts [ 10.719963] [iWare][Info] hisi_i2c_calcu_cfg_cnt bus_freq_hz 100000, scl_fall_cnt 60 scl_rise_cnt 60 total_cnt 2000 scl_hcnt 920 scl_lcnt 1080 [ 10.732890] [iWare][Info] hisi_i2c_calcu_cfg_cnt sda_hold_cnt 80 spk_len 5 scl_hcnt 848 scl_lcnt 1019 [ 10.742442] hisi-i2c fa380000.i2c: [iWare][Info] hisi_i2c_probe end [ 10.749010] hisi-i2c fa390000.i2c: [iWare][Info] hisi_i2c_probe start [ 10.755526] hisi-i2c fa390000.i2c: [iWare][Info] i2c scl_high_ratio no cfg [ 10.762448] hisi-i2c fa390000.i2c: [iWare][Info] get rst and clk from dts [ 10.778437] [iWare][Info] hisi_i2c_calcu_cfg_cnt bus_freq_hz 100000, scl_fall_cnt 60 scl_rise_cnt 60 total_cnt 2000 scl_hcnt 920 scl_lcnt 1080 [ 10.791367] [iWare][Info] hisi_i2c_calcu_cfg_cnt sda_hold_cnt 80 spk_len 5 scl_hcnt 848 scl_lcnt 1019 [ 10.800891] hisi-i2c fa390000.i2c: [iWare][Info] hisi_i2c_probe end [ 10.807415] hisi-i2c fa3b0000.i2c: [iWare][Info] hisi_i2c_probe start [ 10.813923] hisi-i2c fa3b0000.i2c: [iWare][Info] i2c scl_high_ratio no cfg [ 10.820847] hisi-i2c fa3b0000.i2c: [iWare][Info] get rst and clk from dts [ 10.836836] [iWare][Info] hisi_i2c_calcu_cfg_cnt bus_freq_hz 100000, scl_fall_cnt 60 scl_rise_cnt 60 total_cnt 2000 scl_hcnt 920 scl_lcnt 1080 [ 10.849764] [iWare][Info] hisi_i2c_calcu_cfg_cnt sda_hold_cnt 80 spk_len 5 scl_hcnt 848 scl_lcnt 1019 [ 10.859275] hisi-i2c fa3b0000.i2c: [iWare][Info] hisi_i2c_probe end [ 10.865787] hisi-i2c fa3c0000.i2c: [iWare][Info] hisi_i2c_probe start [ 10.872298] hisi-i2c fa3c0000.i2c: [iWare][Info] i2c scl_high_ratio no cfg [ 10.879223] hisi-i2c fa3c0000.i2c: [iWare][Info] get rst and clk from dts [ 10.895207] [iWare][Info] hisi_i2c_calcu_cfg_cnt bus_freq_hz 100000, scl_fall_cnt 60 scl_rise_cnt 60 total_cnt 2000 scl_hcnt 920 scl_lcnt 1080 [ 10.908133] [iWare][Info] hisi_i2c_calcu_cfg_cnt sda_hold_cnt 80 spk_len 5 scl_hcnt 848 scl_lcnt 1019 [ 10.917641] hisi-i2c fa3c0000.i2c: [iWare][Info] hisi_i2c_probe end [ 10.924135] hisi-i2c fa3d0000.i2c: [iWare][Info] hisi_i2c_probe start [ 10.930644] hisi-i2c fa3d0000.i2c: [iWare][Info] i2c scl_high_ratio no cfg [ 10.937559] hisi-i2c fa3d0000.i2c: [iWare][Info] get rst and clk from dts [ 10.953538] [iWare][Info] hisi_i2c_calcu_cfg_cnt bus_freq_hz 100000, scl_fall_cnt 60 scl_rise_cnt 60 total_cnt 2000 scl_hcnt 920 scl_lcnt 1080 [ 10.966464] [iWare][Info] hisi_i2c_calcu_cfg_cnt sda_hold_cnt 80 spk_len 5 scl_hcnt 848 scl_lcnt 1019 [ 10.975986] hisi-i2c fa3d0000.i2c: [iWare][Info] hisi_i2c_probe end [ 10.982483] hisi-i2c fa3e0000.i2c: [iWare][Info] hisi_i2c_probe start [ 10.988993] hisi-i2c fa3e0000.i2c: [iWare][Info] i2c scl_high_ratio no cfg [ 10.995908] hisi-i2c fa3e0000.i2c: [iWare][Info] get rst and clk from dts [ 11.011896] [iWare][Info] hisi_i2c_calcu_cfg_cnt bus_freq_hz 100000, scl_fall_cnt 60 scl_rise_cnt 60 total_cnt 2000 scl_hcnt 920 scl_lcnt 1080 [ 11.024821] [iWare][Info] hisi_i2c_calcu_cfg_cnt sda_hold_cnt 80 spk_len 5 scl_hcnt 848 scl_lcnt 1019 [ 11.034336] hisi-i2c fa3e0000.i2c: [iWare][Info] hisi_i2c_probe end [ 11.040848] hisi-i2c fa3f0000.i2c: [iWare][Info] hisi_i2c_probe start [ 11.047359] hisi-i2c fa3f0000.i2c: [iWare][Info] i2c scl_high_ratio no cfg [ 11.054275] hisi-i2c fa3f0000.i2c: [iWare][Info] get rst and clk from dts [ 11.070263] [iWare][Info] hisi_i2c_calcu_cfg_cnt bus_freq_hz 100000, scl_fall_cnt 60 scl_rise_cnt 60 total_cnt 2000 scl_hcnt 920 scl_lcnt 1080 [ 11.083190] [iWare][Info] hisi_i2c_calcu_cfg_cnt sda_hold_cnt 80 spk_len 5 scl_hcnt 848 scl_lcnt 1019 [ 11.092704] hisi-i2c fa3f0000.i2c: [iWare][Info] hisi_i2c_probe end [ 11.099221] hisi-i2c faab0000.i2c: [iWare][Info] hisi_i2c_probe start [ 11.105733] hisi-i2c faab0000.i2c: [iWare][Info] i2c scl_high_ratio no cfg [ 11.112649] hisi-i2c faab0000.i2c: [iWare][Info] get rst and clk from dts [ 11.128636] [iWare][Info] hisi_i2c_calcu_cfg_cnt bus_freq_hz 100000, scl_fall_cnt 60 scl_rise_cnt 60 total_cnt 2000 scl_hcnt 920 scl_lcnt 1080 [ 11.141563] [iWare][Info] hisi_i2c_calcu_cfg_cnt sda_hold_cnt 80 spk_len 5 scl_hcnt 848 scl_lcnt 1019 [ 11.151068] hisi-i2c faab0000.i2c: [iWare][Info] hisi_i2c_probe end [ 11.157580] hisi-i2c faac0000.i2c: [iWare][Info] hisi_i2c_probe start [ 11.164093] hisi-i2c faac0000.i2c: [iWare][Info] i2c scl_high_ratio no cfg [ 11.171009] hisi-i2c faac0000.i2c: [iWare][Info] get rst and clk from dts [ 11.186998] [iWare][Info] hisi_i2c_calcu_cfg_cnt bus_freq_hz 100000, scl_fall_cnt 60 scl_rise_cnt 60 total_cnt 2000 scl_hcnt 920 scl_lcnt 1080 [ 11.199925] [iWare][Info] hisi_i2c_calcu_cfg_cnt sda_hold_cnt 80 spk_len 5 scl_hcnt 848 scl_lcnt 1019 [ 11.209444] hisi-i2c faac0000.i2c: [iWare][Info] hisi_i2c_probe end [ 11.218700] pmbus_drv fa870000.pmbus0: [iWare][Info] hisi_pmbus_probe:start [ 11.225815] pmbus_drv fa870000.pmbus0: [iWare][Info] clk_freq 200 bus_freq 100000 scl_high_ratio 50, timeout_ms 35 high_idle_us 100 hold_time_ns 625 [ 11.239267] pmbus_drv fa870000.pmbus0: [iWare][Info] avs_wr_unlock_key 0x5a5a5a5a pmbus_wr_unlock_key 0x5a5a5a5a i2c_unlock_key 0x5a5a5a5a [ 11.251844] [iWare][Info] total_cnt 2000, hcnt=1000, lcnt=1000 hold_cnt=125, timeout_cnt=7000000, idle_cnt=20000, [ 11.262158] pmbus_drv fa870000.pmbus0: [iWare][Info] hisi_pmbus_probe: end [ 11.269205] pmbus_drv fa880000.pmbus1: [iWare][Info] hisi_pmbus_probe:start [ 11.276309] pmbus_drv fa880000.pmbus1: [iWare][Info] clk_freq 200 bus_freq 100000 scl_high_ratio 50, timeout_ms 35 high_idle_us 100 hold_time_ns 625 [ 11.289760] pmbus_drv fa880000.pmbus1: [iWare][Info] avs_wr_unlock_key 0x5a5a5a5a pmbus_wr_unlock_key 0x5a5a5a5a i2c_unlock_key 0x5a5a5a5a [ 11.302337] [iWare][Info] total_cnt 2000, hcnt=1000, lcnt=1000 hold_cnt=125, timeout_cnt=7000000, idle_cnt=20000, [ 11.312651] pmbus_drv fa880000.pmbus1: [iWare][Info] hisi_pmbus_probe: end [ 11.319689] pmbus_drv fa890000.pmbus2: [iWare][Info] hisi_pmbus_probe:start [ 11.326788] pmbus_drv fa890000.pmbus2: [iWare][Info] clk_freq 200 bus_freq 100000 scl_high_ratio 50, timeout_ms 35 high_idle_us 100 hold_time_ns 625 [ 11.340247] pmbus_drv fa890000.pmbus2: [iWare][Info] avs_wr_unlock_key 0x5a5a5a5a pmbus_wr_unlock_key 0x5a5a5a5a i2c_unlock_key 0x5a5a5a5a [ 11.352823] [iWare][Info] total_cnt 2000, hcnt=1000, lcnt=1000 hold_cnt=125, timeout_cnt=7000000, idle_cnt=20000, [ 11.363138] pmbus_drv fa890000.pmbus2: [iWare][Info] hisi_pmbus_probe: end [ 11.370173] pmbus_drv fa8a0000.pmbus3: [iWare][Info] hisi_pmbus_probe:start [ 11.377269] pmbus_drv fa8a0000.pmbus3: [iWare][Info] clk_freq 200 bus_freq 100000 scl_high_ratio 50, timeout_ms 35 high_idle_us 100 hold_time_ns 625 [ 11.390720] pmbus_drv fa8a0000.pmbus3: [iWare][Info] avs_wr_unlock_key 0x5a5a5a5a pmbus_wr_unlock_key 0x5a5a5a5a i2c_unlock_key 0x5a5a5a5a [ 11.403295] [iWare][Info] total_cnt 2000, hcnt=1000, lcnt=1000 hold_cnt=125, timeout_cnt=7000000, idle_cnt=20000, [ 11.413609] pmbus_drv fa8a0000.pmbus3: [iWare][Info] hisi_pmbus_probe: end [ 11.423408] sfc_drv fa5c0000.sfc0: [iWare][Info]sfc skip_host_reset 0, 0, 0, 0 [ 11.430719] sfc_drv fa5c0000.sfc0: [iWare][Info]clk_div= 2, hsfc->dummy_cnt= 4! 0, 0 [ 11.438504] sfc_drv fa5c0000.sfc0: [iWare][Info]hisi_sfc_register_nor! 0, 0, 0, 0 [ 11.446026] sfc_drv fa5c0000.sfc0: [iWare][Info]sfc-rx-bus-width = 1, 0, 0, 0 [ 11.453193] sfc_drv fa5c0000.sfc0: [iWare][Info]sfc-tx-bus-width = 1, 0, 0, 0 [ 11.466267] sfc_drv fa5c0000.sfc0: [iWare][Info]after spi_nor_scan read_proto(0x10101),write_proto(0x10101)addr_width(0x4),erase_op(0x21) [ 11.478678] sfc_drv fa5c0000.sfc0: [iWare][Info]read_op(0x13), dummy(0x0),pp_op(0x12),erasesize 4096 [ 11.520738] sfc_drv fa5c0000.sfc0: [iWare][Info]hisi_sfc_register_nor! 0, 0, 0, 0 [ 11.528272] sfc_drv fa5c0000.sfc0: [iWare][Info]sfc-rx-bus-width = 1, 0, 0, 0 [ 11.535443] sfc_drv fa5c0000.sfc0: [iWare][Info]sfc-tx-bus-width = 1, 0, 0, 0 [ 11.550161] sfc_drv fa5c0000.sfc0: [iWare][Error]cs 1 spi_nor_scan fail! 0, 0, 0 [ 11.557594] sfc_drv fa5c0000.sfc0: [iWare][Error]hisi_sfc_register_nor fail! 0, 0, 0, 0 [ 11.565636] sfc_drv fa5c0000.sfc0: [iWare][Info]total_blk_num =16384, 0, 0, 0 [ 11.572806] [iWare][Info]hisi_sfc_dfx_count_init, use malloc mem! 0, 0, 0, 0 [ 11.579930] [iWare][Info]init_mem_area inited success! 0, 0, 0, 0 [ 11.586324] [iWare][Info]init_mem_area inited success! 0, 0, 0, 0 [ 11.600428] hilink serdes: [iWare][Info]clock_route_mode not config, use default mode 0, 0000 [ 11.609108] hilink serdes: [iWare][Info]lane 0 dfe_param not cfg! defalut dfe = <1 1> 000 [ 11.617414] hilink serdes: [iWare][Info]lane 1 dfe_param not cfg! defalut dfe = <1 1> 000 [ 11.625717] hilink serdes: [iWare][Info]lane 8 dfe_param not cfg! defalut dfe = <1 1> 000 [ 11.634020] hilink serdes: [iWare][Info]lane 9 dfe_param not cfg! defalut dfe = <1 1> 000 [ 11.649135] hilink serdes: [iWare][Info]hserdes->reset_mode 0, 000 [ 11.655377] [iWare][Info]chip0 sema_wr init ... pass! [ 11.655383] [iWare][Info]chip_serdes_hardware_init ok [ 11.665533] [iWare][Info]Serdes init from dts, lane_mask = 0x3ff pcie_gen4_link_mode=0 00 [ 11.673748] [iWare][Info]macro_id=2, pcie_cnt=2, sata_cnt=0, 0 [ 11.679699] [iWare][Info]macro_id=2 serdes_reinit, 000 [ 11.684948] [iWare][Info]serdes_reinit:macro_id=2 lane_id=0, mac_id 5 rate:11 pcie_mode 2, pcie_width 2 [ 11.694474] [iWare][Info]serdes_reinit:macro_id=2 lane_id=1, mac_id 5 rate:11 pcie_mode 2, pcie_width 2 [ 11.704009] [iWare][Info]hisds_cs_init_det match, sds_id 6 cs need init [ 11.710658] [iWare][Info]hisds_cs_init_det match, sds_id 7 cs need init [ 11.717325] [iWare][Info]chip30_serdes_par_init_process line 142 macro 2 powerup [ 11.766898] [iWare][Info][macro_fw_init_calibration]Macro calibration success [ 11.776892] [iWare][Info]Adapt Config success! [ 11.776897] [iWare][Info]serdes_macro_init, macro_id=2 single_lane_init_mask=0xc 00 [ 11.789225] [iWare][Info]macro_id:2, lane:2,serdes_single_lane_init 00 [ 11.795875] [iWare][Info]chip_serdes_lane_init phy_sds_id 8 cs need init [ 11.802699] [iWare][Info]csinfo: macro_id = 2, pll_id = 0, rate = 6, refclk = 156250, refclk_sel = 0, vco_freq = 15000000, hs_clk = 10000000, use_mode = 64 [ 11.821475] [iWare][Info]Clockslice calibration success! [ 11.827123] [iWare][Info]ds 2 firmware reset success! [ 11.840429] [iWare][Info]macro_id:2, lane:3,serdes_single_lane_init 00 [ 11.852146] [iWare][Info]chip_serdes_lane_init phy_sds_id 9 cs no need init [ 11.859238] [iWare][Info]ds 3 firmware reset success! [ 11.873344] [iWare][Info]macro_id=0, pcie_cnt=0, sata_cnt=0, 0 [ 11.884364] [iWare][Info]macro_id=0 serdes_reinit, 000 [ 11.889613] [iWare][Info]serdes_reinit:macro_id=0 lane_id=0, mac_id 4 rate:2 pcie_mode 0, pcie_width 0 [ 11.899048] [iWare][Info]serdes_reinit:macro_id=0 lane_id=1, mac_id 5 rate:2 pcie_mode 0, pcie_width 0 [ 11.908483] [iWare][Info]serdes_reinit:macro_id=0 lane_id=2, mac_id 0 rate:18 pcie_mode 0, pcie_width 0 [ 11.918006] [iWare][Info]serdes_reinit:macro_id=0 lane_id=3, mac_id 1 rate:18 pcie_mode 0, pcie_width 0 [ 11.927536] [iWare][Info]hisds_cs_init_det match, sds_id 0 cs need init [ 11.934183] [iWare][Info]hisds_cs_init_det match, sds_id 1 cs need init [ 11.940830] [iWare][Info]hisds_cs_init_det match, sds_id 2 cs need init [ 11.947476] [iWare][Info]hisds_cs_init_det match, sds_id 3 cs need init [ 11.954142] [iWare][Info]chip30_serdes_par_init_process line 142 macro 0 powerup [ 12.008900] [iWare][Info][macro_fw_init_calibration]Macro calibration success [ 12.018886] [iWare][Info]Adapt Config success! [ 12.018890] [iWare][Info]serdes_macro_init, macro_id=0 single_lane_init_mask=0x0 00 [ 12.031220] [iWare][Info]macro_id=1, pcie_cnt=1, sata_cnt=1, 0 [ 12.037168] [iWare][Info]macro_id=1 serdes_reinit, 000 [ 12.042417] [iWare][Info]serdes_reinit:macro_id=1 lane_id=1, mac_id 0 rate:13 pcie_mode 2, pcie_width 1 [ 12.051947] [iWare][Info]hisds_cs_init_det match, sds_id 5 cs need init [ 12.058614] [iWare][Info]chip30_serdes_par_init_process line 142 macro 1 powerup [ 12.109900] [iWare][Info][macro_fw_init_calibration]Macro calibration success [ 12.119886] [iWare][Info]Adapt Config success! [ 12.119890] [iWare][Info]serdes_macro_init, macro_id=1 single_lane_init_mask=0x1 00 [ 12.132220] [iWare][Info]macro_id:1, lane:0,serdes_single_lane_init 00 [ 12.138866] [iWare][Info]chip_serdes_lane_init phy_sds_id 4 cs need init [ 12.145690] [iWare][Info]csinfo: macro_id = 1, pll_id = 0, rate = 17, refclk = 100000, refclk_sel = 1, vco_freq = 12000000, hs_clk = 6000000, use_mode = 2 [ 12.164643] [iWare][Info]Clockslice calibration success! [ 12.170081] [iWare][Info]ds 0 firmware reset success! [ 12.181352] [iWare][Info]serdes_ds_dfe_init: macro(0) ds(0) dfe init 1 1 [ 12.193266] [iWare][Info]serdes_ds_dfe_init: macro(0) ds(1) dfe init 1 1 [ 12.200006] [iWare][Info]serdes_ds_dfe_init: macro(2) ds(2) dfe init 1 1 [ 12.206846] [iWare][Info]serdes_ds_dfe_init: macro(2) ds(3) dfe init 1 1 [ 12.217692] udrv-pcie b00000000.pcie: [iWare] no declare type support, default rp mode [ 12.240709] [iWare][Info] host_id: 0x0 [ 12.244913] [iWare][Info] host_support_type_mask: 0x2 [ 12.249989] [iWare][Info] core_version: 0x0 [ 12.254190] [iWare][Info] msi_irq: 0x45 [ 12.258479] [iWare][Info] clk_num: 0x2 [ 12.262681] [iWare][Info] rst_num: 0x1 [ 12.266884] [iWare][Info] port_id: 0x0 [ 12.271085] [iWare][Info] port_type: 0x1 [ 12.275286] [iWare][Info] lport_id: 0x0 [ 12.279487] [iWare][Info] idr: 0x0 [ 12.283689] [iWare][Info] core_id: 0x0 [ 12.287891] [iWare][Info] lane_num: 0x1 [ 12.292092] [iWare][Info] target_speed: 0x1 [ 12.296294] [iWare][Info] max_lanes: 0x1 [ 12.300495] [iWare][Info] max_speed: 0x3 [ 12.304697] [iWare][Info] is_probe: 0x1 [ 12.308898] [iWare][Info] size = 0x1f800000 atu_mode = 0x0 [ 12.424354] udrv-pcie b00000000.pcie: [iWare][Info] msi#0 address_hi 0x0 address_lo 0x700000 [ 12.432847] udrv-pcie b00000000.pcie: [iWare][Info] msi#1 address_hi 0x0 address_lo 0x700000 [ 12.441324] udrv-pcie b00000000.pcie: [iWare][Info] msi#2 address_hi 0x0 address_lo 0x700000 [ 12.449801] udrv-pcie b00000000.pcie: [iWare][Info] msi#3 address_hi 0x0 address_lo 0x700000 [ 12.458278] udrv-pcie b00000000.pcie: [iWare][Info] msi#4 address_hi 0x0 address_lo 0x700000 [ 12.466755] udrv-pcie b00000000.pcie: [iWare][Info] msi#5 address_hi 0x0 address_lo 0x700000 [ 12.475232] udrv-pcie b00000000.pcie: [iWare][Info] msi#6 address_hi 0x0 address_lo 0x700000 [ 12.483708] udrv-pcie b00000000.pcie: [iWare][Info] msi#7 address_hi 0x0 address_lo 0x700000 [ 12.492185] udrv-pcie b00000000.pcie: [iWare][Info] msi#8 address_hi 0x0 address_lo 0x700000 [ 12.500662] udrv-pcie b00000000.pcie: [iWare][Info] msi#9 address_hi 0x0 address_lo 0x700000 [ 12.509139] udrv-pcie b00000000.pcie: [iWare][Info] msi#10 address_hi 0x0 address_lo 0x700000 [ 12.517703] udrv-pcie b00000000.pcie: [iWare][Info] msi#11 address_hi 0x0 address_lo 0x700000 [ 12.526267] udrv-pcie b00000000.pcie: [iWare][Info] msi#12 address_hi 0x0 address_lo 0x700000 [ 12.534830] udrv-pcie b00000000.pcie: [iWare][Info] msi#13 address_hi 0x0 address_lo 0x700000 [ 12.543394] udrv-pcie b00000000.pcie: [iWare][Info] msi#14 address_hi 0x0 address_lo 0x700000 [ 12.551958] udrv-pcie b00000000.pcie: [iWare][Info] msi#15 address_hi 0x0 address_lo 0x700000 [ 12.560521] udrv-pcie b00000000.pcie: [iWare][Info] msi#16 address_hi 0x0 address_lo 0x700000 [ 12.569085] udrv-pcie b00000000.pcie: [iWare][Info] msi#17 address_hi 0x0 address_lo 0x700000 [ 12.577648] udrv-pcie b00000000.pcie: [iWare][Info] msi#18 address_hi 0x0 address_lo 0x700000 [ 12.586212] udrv-pcie b00000000.pcie: [iWare][Info] msi#19 address_hi 0x0 address_lo 0x700000 [ 12.594775] udrv-pcie b00000000.pcie: [iWare][Info] msi#20 address_hi 0x0 address_lo 0x700000 [ 12.603349] udrv-pcie b00000000.pcie: [iWare][Info] msi#21 address_hi 0x0 address_lo 0x700000 [ 12.611914] udrv-pcie b00000000.pcie: [iWare][Info] msi#22 address_hi 0x0 address_lo 0x700000 [ 12.620478] udrv-pcie b00000000.pcie: [iWare][Info] msi#23 address_hi 0x0 address_lo 0x700000 [ 12.629042] udrv-pcie b00000000.pcie: [iWare][Info] msi#24 address_hi 0x0 address_lo 0x700000 [ 12.637606] udrv-pcie b00000000.pcie: [iWare][Info] msi#25 address_hi 0x0 address_lo 0x700000 [ 12.646170] udrv-pcie b00000000.pcie: [iWare][Info] msi#26 address_hi 0x0 address_lo 0x700000 [ 12.654734] udrv-pcie b00000000.pcie: [iWare][Info] msi#27 address_hi 0x0 address_lo 0x700000 [ 12.663297] udrv-pcie b00000000.pcie: [iWare][Info] msi#28 address_hi 0x0 address_lo 0x700000 [ 12.671860] udrv-pcie b00000000.pcie: [iWare][Info] msi#29 address_hi 0x0 address_lo 0x700000 [ 12.680423] udrv-pcie b00000000.pcie: [iWare][Info] msi#30 address_hi 0x0 address_lo 0x700000 [ 12.688987] udrv-pcie b00000000.pcie: [iWare][Info] msi#31 address_hi 0x0 address_lo 0x700000 [ 12.698007] udrv-pcie b00000000.pcie: [iWare][Info] msi#0 address_hi 0x0 address_lo 0x700000 [ 12.732152] udrv-pcie b20000000.pcie: [iWare] no declare type support, default rp mode [ 12.755170] [iWare][Info] host_id: 0x1 [ 12.759376] [iWare][Info] host_support_type_mask: 0x2 [ 12.764450] [iWare][Info] core_version: 0x0 [ 12.768651] [iWare][Info] msi_irq: 0x46 [ 12.772941] [iWare][Info] clk_num: 0x2 [ 12.777142] [iWare][Info] rst_num: 0x1 [ 12.781345] [iWare][Info] port_id: 0x0 [ 12.785546] [iWare][Info] port_type: 0x1 [ 12.789749] [iWare][Info] lport_id: 0x1 [ 12.793951] [iWare][Info] idr: 0x1 [ 12.798153] [iWare][Info] core_id: 0x0 [ 12.802355] [iWare][Info] lane_num: 0x1 [ 12.806558] [iWare][Info] target_speed: 0x1 [ 12.810759] [iWare][Info] max_lanes: 0x1 [ 12.814962] [iWare][Info] max_speed: 0x3 [ 12.819163] [iWare][Info] is_probe: 0x0 [ 12.823366] [iWare][Info] size = 0x1f800000 atu_mode = 0x0 [ 12.861135] udrv-pcie b40000000.pcie: [iWare] no declare type support, default rp mode [ 12.884117] [iWare][Info] host_id: 0x2 [ 12.888323] [iWare][Info] host_support_type_mask: 0x2 [ 12.893399] [iWare][Info] core_version: 0x0 [ 12.897601] [iWare][Info] msi_irq: 0x47 [ 12.901891] [iWare][Info] clk_num: 0x2 [ 12.906092] [iWare][Info] rst_num: 0x1 [ 12.910295] [iWare][Info] port_id: 0x0 [ 12.914496] [iWare][Info] port_type: 0x1 [ 12.918699] [iWare][Info] lport_id: 0x2 [ 12.922901] [iWare][Info] idr: 0x2 [ 12.927103] [iWare][Info] core_id: 0x0 [ 12.931305] [iWare][Info] lane_num: 0x1 [ 12.935507] [iWare][Info] target_speed: 0x1 [ 12.939708] [iWare][Info] max_lanes: 0x1 [ 12.943911] [iWare][Info] max_speed: 0x3 [ 12.948114] [iWare][Info] is_probe: 0x0 [ 12.952317] [iWare][Info] size = 0x1f800000 atu_mode = 0x0 [ 12.990050] udrv-pcie b60000000.pcie: [iWare] no declare type support, default rp mode [ 13.013032] [iWare][Info] host_id: 0x3 [ 13.017238] [iWare][Info] host_support_type_mask: 0x2 [ 13.022313] [iWare][Info] core_version: 0x0 [ 13.026515] [iWare][Info] msi_irq: 0x48 [ 13.030804] [iWare][Info] clk_num: 0x2 [ 13.035006] [iWare][Info] rst_num: 0x1 [ 13.039209] [iWare][Info] port_id: 0x0 [ 13.043410] [iWare][Info] port_type: 0x1 [ 13.047611] [iWare][Info] lport_id: 0x3 [ 13.051813] [iWare][Info] idr: 0x3 [ 13.056015] [iWare][Info] core_id: 0x0 [ 13.060217] [iWare][Info] lane_num: 0x1 [ 13.064420] [iWare][Info] target_speed: 0x1 [ 13.068622] [iWare][Info] max_lanes: 0x1 [ 13.072825] [iWare][Info] max_speed: 0x3 [ 13.077027] [iWare][Info] is_probe: 0x0 [ 13.081230] [iWare][Info] size = 0x1f800000 atu_mode = 0x0 [ 13.118957] udrv-pcie b80000000.pcie: [iWare] no declare type support, default rp mode [ 13.141928] [iWare][Info] host_id: 0x4 [ 13.146133] [iWare][Info] host_support_type_mask: 0x2 [ 13.151208] [iWare][Info] core_version: 0x0 [ 13.155410] [iWare][Info] msi_irq: 0x49 [ 13.159700] [iWare][Info] clk_num: 0x2 [ 13.163903] [iWare][Info] rst_num: 0x1 [ 13.168105] [iWare][Info] port_id: 0x0 [ 13.172308] [iWare][Info] port_type: 0x1 [ 13.176511] [iWare][Info] lport_id: 0x4 [ 13.180713] [iWare][Info] idr: 0x4 [ 13.184915] [iWare][Info] core_id: 0x0 [ 13.189118] [iWare][Info] lane_num: 0x2 [ 13.193320] [iWare][Info] target_speed: 0x1 [ 13.197522] [iWare][Info] max_lanes: 0x1 [ 13.201724] [iWare][Info] max_speed: 0x3 [ 13.205927] [iWare][Info] is_probe: 0x0 [ 13.210130] [iWare][Info] size = 0x1f800000 atu_mode = 0x0 [ 13.247854] udrv-pcie ba0000000.pcie: [iWare] no declare type support, default rp mode [ 13.270833] [iWare][Info] host_id: 0x5 [ 13.275037] [iWare][Info] host_support_type_mask: 0x2 [ 13.280112] [iWare][Info] core_version: 0x0 [ 13.284315] [iWare][Info] msi_irq: 0x4a [ 13.288605] [iWare][Info] clk_num: 0x2 [ 13.292807] [iWare][Info] rst_num: 0x1 [ 13.297010] [iWare][Info] port_id: 0x0 [ 13.301213] [iWare][Info] port_type: 0x1 [ 13.305415] [iWare][Info] lport_id: 0x5 [ 13.309617] [iWare][Info] idr: 0x5 [ 13.313820] [iWare][Info] core_id: 0x0 [ 13.318021] [iWare][Info] lane_num: 0x2 [ 13.322224] [iWare][Info] target_speed: 0x3 [ 13.326426] [iWare][Info] max_lanes: 0x2 [ 13.330629] [iWare][Info] max_speed: 0x3 [ 13.334832] [iWare][Info] is_probe: 0x1 [ 13.339034] [iWare][Info] size = 0x1f800000 atu_mode = 0x0 [ 13.454261] udrv-pcie ba0000000.pcie: [iWare][Info] msi#0 address_hi 0x0 address_lo 0x700000 [ 13.462754] udrv-pcie ba0000000.pcie: [iWare][Info] msi#1 address_hi 0x0 address_lo 0x700000 [ 13.471233] udrv-pcie ba0000000.pcie: [iWare][Info] msi#2 address_hi 0x0 address_lo 0x700000 [ 13.479711] udrv-pcie ba0000000.pcie: [iWare][Info] msi#3 address_hi 0x0 address_lo 0x700000 [ 13.488189] udrv-pcie ba0000000.pcie: [iWare][Info] msi#4 address_hi 0x0 address_lo 0x700000 [ 13.496666] udrv-pcie ba0000000.pcie: [iWare][Info] msi#5 address_hi 0x0 address_lo 0x700000 [ 13.505144] udrv-pcie ba0000000.pcie: [iWare][Info] msi#6 address_hi 0x0 address_lo 0x700000 [ 13.513622] udrv-pcie ba0000000.pcie: [iWare][Info] msi#7 address_hi 0x0 address_lo 0x700000 [ 13.522099] udrv-pcie ba0000000.pcie: [iWare][Info] msi#8 address_hi 0x0 address_lo 0x700000 [ 13.530577] udrv-pcie ba0000000.pcie: [iWare][Info] msi#9 address_hi 0x0 address_lo 0x700000 [ 13.539054] udrv-pcie ba0000000.pcie: [iWare][Info] msi#10 address_hi 0x0 address_lo 0x700000 [ 13.547619] udrv-pcie ba0000000.pcie: [iWare][Info] msi#11 address_hi 0x0 address_lo 0x700000 [ 13.556183] udrv-pcie ba0000000.pcie: [iWare][Info] msi#12 address_hi 0x0 address_lo 0x700000 [ 13.564748] udrv-pcie ba0000000.pcie: [iWare][Info] msi#13 address_hi 0x0 address_lo 0x700000 [ 13.573312] udrv-pcie ba0000000.pcie: [iWare][Info] msi#14 address_hi 0x0 address_lo 0x700000 [ 13.581877] udrv-pcie ba0000000.pcie: [iWare][Info] msi#15 address_hi 0x0 address_lo 0x700000 [ 13.590446] udrv-pcie ba0000000.pcie: [iWare][Info] msi#16 address_hi 0x0 address_lo 0x700000 [ 13.599010] udrv-pcie ba0000000.pcie: [iWare][Info] msi#17 address_hi 0x0 address_lo 0x700000 [ 13.607575] udrv-pcie ba0000000.pcie: [iWare][Info] msi#18 address_hi 0x0 address_lo 0x700000 [ 13.616139] udrv-pcie ba0000000.pcie: [iWare][Info] msi#19 address_hi 0x0 address_lo 0x700000 [ 13.624703] udrv-pcie ba0000000.pcie: [iWare][Info] msi#20 address_hi 0x0 address_lo 0x700000 [ 13.633268] udrv-pcie ba0000000.pcie: [iWare][Info] msi#21 address_hi 0x0 address_lo 0x700000 [ 13.641832] udrv-pcie ba0000000.pcie: [iWare][Info] msi#22 address_hi 0x0 address_lo 0x700000 [ 13.650397] udrv-pcie ba0000000.pcie: [iWare][Info] msi#23 address_hi 0x0 address_lo 0x700000 [ 13.658961] udrv-pcie ba0000000.pcie: [iWare][Info] msi#24 address_hi 0x0 address_lo 0x700000 [ 13.667525] udrv-pcie ba0000000.pcie: [iWare][Info] msi#25 address_hi 0x0 address_lo 0x700000 [ 13.676090] udrv-pcie ba0000000.pcie: [iWare][Info] msi#26 address_hi 0x0 address_lo 0x700000 [ 13.684654] udrv-pcie ba0000000.pcie: [iWare][Info] msi#27 address_hi 0x0 address_lo 0x700000 [ 13.693219] udrv-pcie ba0000000.pcie: [iWare][Info] msi#28 address_hi 0x0 address_lo 0x700000 [ 13.701783] udrv-pcie ba0000000.pcie: [iWare][Info] msi#29 address_hi 0x0 address_lo 0x700000 [ 13.710348] udrv-pcie ba0000000.pcie: [iWare][Info] msi#30 address_hi 0x0 address_lo 0x700000 [ 13.718913] udrv-pcie ba0000000.pcie: [iWare][Info] msi#31 address_hi 0x0 address_lo 0x700000 [ 13.727925] udrv-pcie ba0000000.pcie: [iWare][Info] msi#0 address_hi 0x0 address_lo 0x700000 [ 13.762078] udrv-pcie bc0000000.pcie: [iWare] no declare type support, default rp mode [ 13.785069] [iWare][Info] host_id: 0x6 [ 13.789272] [iWare][Info] host_support_type_mask: 0x2 [ 13.794348] [iWare][Info] core_version: 0x0 [ 13.798549] [iWare][Info] msi_irq: 0x4b [ 13.802839] [iWare][Info] clk_num: 0x2 [ 13.807040] [iWare][Info] rst_num: 0x1 [ 13.811242] [iWare][Info] port_id: 0x0 [ 13.815443] [iWare][Info] port_type: 0x1 [ 13.819644] [iWare][Info] lport_id: 0x6 [ 13.823845] [iWare][Info] idr: 0x6 [ 13.828047] [iWare][Info] core_id: 0x0 [ 13.832248] [iWare][Info] lane_num: 0x1 [ 13.836450] [iWare][Info] target_speed: 0x1 [ 13.840651] [iWare][Info] max_lanes: 0x1 [ 13.844852] [iWare][Info] max_speed: 0x3 [ 13.849053] [iWare][Info] is_probe: 0x0 [ 13.853256] [iWare][Info] size = 0x1f800000 atu_mode = 0x0 [ 13.891008] udrv-pcie be0000000.pcie: [iWare] no declare type support, default rp mode [ 13.913979] [iWare][Info] host_id: 0x7 [ 13.918183] [iWare][Info] host_support_type_mask: 0x2 [ 13.923257] [iWare][Info] core_version: 0x0 [ 13.927458] [iWare][Info] msi_irq: 0x4c [ 13.931747] [iWare][Info] clk_num: 0x2 [ 13.935948] [iWare][Info] rst_num: 0x1 [ 13.940149] [iWare][Info] port_id: 0x0 [ 13.944350] [iWare][Info] port_type: 0x1 [ 13.948551] [iWare][Info] lport_id: 0x7 [ 13.952753] [iWare][Info] idr: 0x7 [ 13.956955] [iWare][Info] core_id: 0x0 [ 13.961156] [iWare][Info] lane_num: 0x1 [ 13.965357] [iWare][Info] target_speed: 0x1 [ 13.969558] [iWare][Info] max_lanes: 0x1 [ 13.973758] [iWare][Info] max_speed: 0x3 [ 13.977961] [iWare][Info] is_probe: 0x0 [ 13.982163] [iWare][Info] size = 0x1f800000 atu_mode = 0x0 [ 14.022852] sata_hisi d8500000.sata_dfx: [iWare][Info] get rst and clk from dts [ 14.030355] [iWare][Info]set tx_bitorder 0 , rx_bitorder 1 [ 14.038323] [iWare][Info] udrv log init ok [ 14.093780] usb_hisi usb_hisi_0: [iWare] no misc base [ 14.099241] usb_hisi usb_hisi_1: [iWare] no misc base [ 371.687427] [iWare][Error] pmbus_write timeout! raw_int_status:0x10 [ 371.694731] [iWare][Info] pmbus hang recovery done [ 2064.422683] [iWare][Error] pmbus_write timeout! raw_int_status:0x10 [ 2064.429992] [iWare][Info] pmbus hang recovery done [ 2069.219986] [iWare][Error] wait read_finish timeout!! read_len[2] fifo num[0], raw_int_status:0x10 [ 2069.229992] [iWare][Info] pmbus hang recovery done [ 2069.234807] [iWare][Error] pmbus_read_bytes_v200 slave_addr(0x70), cmd(0x8b), time out [ 2069.243769] [iWare][Info] pmbus hang recovery done [ 2085.989229] [iWare][Error] pmbus_write timeout! raw_int_status:0x10 [ 2085.996530] [iWare][Info] pmbus hang recovery done hi309a /lib/udrivers # timed out waiting for input: auto-logoutprocess '/sbin/getty 115200 ttyS0' (pid 670) exited. Scheduling for restart. starting pid 692, tty '/dev/ttyS0': '/sbin/getty 115200 ttyS0' openEuler Embedded(openEuler Embedded Reference Distro) 24.03-LTS hi309a /dev/ttyS0 ______ _ | ____| | | ___ ____ ___ _____| |__ _ _| | ___ _ __ / _ \| _ \ / _ \ _ | __|| | | | |/ _ \ '__| | (_) | |_) | __/ | | | |___| |_| | | __/ | \___/| __/ \___|_| |_|______\____|_|\___|_| | | _____ _ _ _ _ |_| | __|_____| |_ ___ _| |_| |___ _| | | __| | . | -_| . | . | -_| . | |_____|_|_|_|___|___|___|___|___|___| Authorized uses only. All activity may be monitored and reported. 监控总线状态打印如上 请根据以上几段代码,帮我分析我出现kdrv_pmbus_write_word fail bus_id:1, addr:0x70, cmd:0x21的原因可能是什么,并给出完整解决方案”
08-07
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