FPGA 喇叭不同音节控制

https://www.fpga4fun.com/MusicBox.html
FPGA一个引脚控制喇叭发声   25MHz
项目一、发出一个单音 哔哔

module music(clk, speaker);
input clk;
output speaker;

// 16位计数
reg [15:0] counter;
always @(posedge clk) counter <= counter+1;

//计数器高位设置喇叭
assign speaker = counter[15];
endmodule

项目二：设置发出固定频率440Hz声音
“A”音符（440Hz）        时钟周期25000000/440=56818
                56818/2=28408
module music(clk, speaker);
input clk;
output speaker;

reg [14:0] counter;
always @(posedge clk) if(counter==28408) counter<=0; else counter <= counter+1;

reg speaker;
always @(posedge clk) if(counter==28408) speaker <= ~speaker;
endmodule    

升级
module music(clk, speaker);
input clk;
output speaker;
parameter clkdivider = 25000000/440/2;

reg [14:0] counter;