How to use the open source simulator SimpleScalar to obtain the memory access trace of a program?

Memory access tracing is a key step in optimizing the data allocation for software/hardware co-optimization on size, weight and power limited embedded chip multiprocessor (CMP). However, how to obtain the memory access trace of a program using SimpleScalar is a big and basic question.

I have sent three emails to different researchers to investigate the answer to this question, however, the emails like a stone in water. Having struggled about several days, I have finally successfully answered this question by myself.

The sim-profile tool provided by SimpleScalar has laid the foundation for analyzing the memory access trace of the program. Based on the source code of sim-profile and SimpleScalar, the researcher can easily modify it so as to adapt it to meet specific requirements.

While analyzing the memory access tracing, there may be two requirements, i.e., analyzing the memory access trace of a specific section of the program, e.g., one function, a while loop, etc., obtaining the read and write number of the memory and the space locality of the memory.

To meet the first requirement, the method is proposed by Shao-Liang Peng, i.e., modifying the source code in syscall.c of SimpleScalar. This method is proposed based on the architecture of SimpleScalar. Shao-Liang Peng observed that SimpleScalar uses functions in syscall.c to broke the function of the system call of Linux. Hence, by using specific system calls in the program, it is possible to notify the sim-profile when a specific section of the program starts and ends. Hence, by analyzing the output of sim-profile the user is able to collect the memory access trace of a specific section of the program.

To meet the second requirement, the user has to modify the main function in sim-profile.c so as to make the profiler output the memory access trace. The key is detecting and disassembling the memory access instruction. To do it, the user is recommended to refer to the instruction set architecture of the processor.

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