KylinCommander

0. Background​ The exponent part of the IEEE Floating-Point Representation is encoded in a biased form. During my design of the ALU for the floating point, I need to find a way to extend the biased form for one bit without change the actual value which it

The Last two month I was working for a porject of my lab. And I am responsible for designing a Floating-point ALU module with Verilog. Due to its confidentiality, I can’t publish the original code of what I am doing right now(Or maybe forever). But the bu