我们必须找到除了爱情之外，能够让我们用双脚，坚强站立的东西。

80The difference between SCSI and PCI.The PCI bus is designed to be a parallel interface. Each device plugged in uses an IRQ or interrupt request to access the cpu and perform its function. Usua

3 kinds of  cache misses-compulsory misses-capacity misses-collision missesways to reduce cache miss penalty-multilevel cache-critical word first-victim cacheways to improv

今天在翻看以前的系统级编程作业时，不经意间看到了Amdahl's law 和 The 80/20 Rule，想起了当时的一些感谢，今天写出来：　　记得当时刚看完了之后，颇有感触 ，于是找出了Adahl's law 的数学证明：Speedup(due to EnhanceMent E) = ExcuteTime(without E)/ExcuteTime(With E) = Perfor

Direct map and Set associate These words are a little bit confused.In direct map.A memory address is consist of three parts. tag(t bits), line(l bits) and word(w bits)// This address is physical

·Computer system overview-location-capacity-unit of transfer  cpu(word)-cache(word)-main memory(block)-disk(page)  1 byte is always 8 bits  1 word, it's just the number of bits the CPU c

Direct -Mapping Cache Organization (The transaction among cpu, cache and main memory)Memory address is consist of three parts: Tag, line and word.For example, the line is r bits, the word is w b

-memory stall cycles= IC*(memory references per instruction*missrate)*miss penalty-program execution time= [cpu clock cycles(includes cache hits)+memory stall cycles(cache miss)]*clock cycle time

1 QNX内核简介QNX的微内核结构是它区别于其它操作系统的显著特点。平板式内存结构，所有的程序都使用同一个地址空间，不加保护；应用程序可以自由访问所有空间，效率较高，但是任何应用程序指针错误都可能会导致内核崩溃。大内核内存结构，如图2所示，操作系统内核和各种驱动程序、网络协议在同一个地址空间，应用程序在单独空间；内核模块同处于一个保护空间，运行效率高，应用程序无法直接访问