PCMCIA 32 bit Bus

 

Personal Computer Memory Card International Association

CardBus Description

PCMCIA Defines both the Electrical and Physical specifications for a 68 pin interface residing in one of 3 form factors, which differ only in thickness;

Type I: 3.3mm x 85.6mm x 54.0mm (TxLxW), Version 2.1 allows the length to increase 50mm to 135mm
Type II: 5.0mm x 85.6mm x 54.0mm (TxLxW), Version 2.1 allows the length to increase 50mm to 135mm
Type III: 10.5mm x 85.6mm x 54.0mm (TxLxW)

CardBus operates over 32 bits at 33MHz [multiplexed address/data path].
It's called CardBus when implementing the local PCI bus (32 data bits only).
The peak data transfer rate is 132MBps [synchronous burst-transfer orientation]. CardBus Uses only 3.3v V_CC as the power supply.
Cardbus devices may act as either [System-Bus] Master or Slave, while 16-bit PC Card devices may only act as slaves.
CardBus is fully backward compatible with the older PCMCIA [PC-card design]; however there may be some compatibility issues with the early versions of the PCMCIA standards.
The implementation of this spec based on the ISA bus is termed the PC Card A 8/16 bit data bus, 26 address lines, no bus mastering operating at ISA Bus speeds (8 MHz) using an ISA-like asynchronous protocol. How ever CardBus offers newer technology with a faster and wider bus, providing higher through-put.

Miniature Card is a smaller implementation of PCMCIA. Miniature Cards dimensions are: 3.5mm x 33mm x 38mm (TxLxW). The electrical specifications are a subset of the PC Card standard, restricted to memory applications only. It uses a 16-bit data bus and a 24-bit address bus to allow a single card to store up to 64MB.

Cardbus, PinOut

CardBus Interface Signal Assignments (Pinout)

CardBus Connector Pin Out

Pin #	Signal Name	Pin Function	Pin #	Signal Name	Pin Function
1	Ground	----	35	GND	Ground
2	CAD0	Address/data bit 0 , I/O	36	CCD1	Card Detect 1
3	CAD1	Address/data bit 1, I/O	37	CAD2	Address/data bit 2, I/O
4	CAD3	Address/data bit 3, I/O	38	CAD4	Address/data bit 4, I/O
5	CAD5	Address/data bit 5, I/O	39	CAD6	Address/data bit 6, I/O
6	CAD7	Address/data bit 7, I/O	40	RFU	Reserved for future use
7	CC/BE0	Byte Enable, I	41	CAD8	Address/data bit 8, I/O
8	CAD9	Address/data bit 9, I	42	CAD10	Address/data bit 10, I/O
9	CAD11	Address/data bit 11, I/O	43	CVS1	---, I
10	CAD12	Address/data bit 12, I	44	CAD13	Address/data bit 13, I/O
11	CAD14	Address/data bit 14, I	45	CAD15	Address/data bit 15, I/O
12	CC/BE1	Byte Enable 1, I	46	CAD16	Address/data bit 16, I/O
13	CPAR	Parity Bit, I	47	RFU	Reserved for future use
14	PERR	Parity Error, I	48	CBCLOCK	--
15	CGNT	Bus arbitration grant, I	49	CSTOP	--
16	CINT	Ready/Bus , O	50	CDEVSEL	Device Select
17	Vcc	Supply Voltage	51	Vcc	--
18	Vpp1	Programming Voltage 1	52	Vpp2	Programming Voltage 2
19	CCLK	Bus clock, 0 to 33MHz	53	CTRDY	--
20	CIRDY	Ready, I	54	CFRAME	Data Frame indicator
21	CC/BE2	Byte enable 2, I	55	CAD17	Address/data bit 17, I/O
22	CAD18	Address/data bit 18, I/O	56	CAD19	Address/data bit 19, I/O
23	CAD20	Address/data bit 20, I/O	57	CVS2	--
24	CAD21	Address/data bit 21, I/O	58	CRST	Reset
25	CAD22	Address/data bit 22, I/O	59	CSERR	System Reset
26	CAD23	Address/data bit 23, I/O	60	CREQ	Arbitration Request
27	CAD24	Address/data bit 24, I/O	61	CC/BE3	Byte Enable 3
28	CAD25	Address/data bit 25, I/O	62	CAUDIO	Card Audio Output, O
29	CAD26	Address/data bit 26, I/O	63	CSTSCHG	--
30	CAD27	Address/data bit 27, I/O	64	CAD28	Address/data bit 28, I/O
31	CAD29	Address/data bit 29, I/O	65	CAD30	Address/data bit 30, I/O
32	RFU	Reserved for future use	66	CAD31	Address/data bit 31, I/O
33	CCLKRUN	--, O	67	CCD2	Card Detect 2
34	GND	Ground	68	GND	Ground

The Cardbus pinouts are defined for a 68 pin connector; 2 rows of 34 pins. From the table above:
I: is Input, toward the card
O: is Output, output from the card
I/O: is Input or Output, bidirectional to-and-from the card